Zobrazeno 1 - 10
of 29
pro vyhledávání: '"Yoo-Hyon Kim"'
Autor:
Kang Doosuk, Yoo-Hyon Kim, Young-Chul Shin, Tae Geun Kim, Yu-Sun Park, Byung-Uk Kim, Kyung-Rae Kim, Dooil Kim
Publikováno v:
Physica B: Condensed Matter. :610-613
To find the optimal growth and annealing conditions for high-power 650 nm band AlGaInP laser diodes, we carried out defect engineering, in which the distribution and density of deep level defects of the laser structure was analyzed. For this purpose,
Autor:
Jong-Won Lee, Yoo-Hyon Kim, James Word, Young-Seok Woo, Shady Abdelwahed, Juhwan Kim, Woon-Hyuk Choi, Beom-Seok Seo, Vladislav Liubich
Publikováno v:
SPIE Proceedings.
As the industry progresses toward smaller patterning nodes with tighter CD error budgets and narrower process windows, the ability to control pattern quality becomes a critical, yield-limiting factor. In addition, as the feature size of design layout
Autor:
Stewart A. Robertson, Woon-Hyuk Choi, Byung-Sung Kim, Mark D. Smith, Yoo-Hyon Kim, John J. Biafore
Publikováno v:
Optical Microlithography XXI.
If RET selection by simulation is to be successful for the deep sub-wavelength technologies of today, then the predictions of the simulator must be quantitatively accurate over the parameter space of interest. The Rigorous Physical resist Model (RPM)
Autor:
Dong-Hyun Kim, Soo-Han Choi, Moon-Hyun Yoo, Jeong-Taek Kong, Eun-Sung Kim, Yongchan Ban, A-Young Je, Dae-Youp Lee, Hyoung-Joo Youn, Yoo-Hyon Kim, Tae-Hoon Park, Ji-Suk Hong
Publikováno v:
Optical Microlithography XVIII.
The k1 factor of the 65nm node device approaches to around 0.3 or even below because the device shrinking is much faster than the development speed of the high NA ArF scanner. Since the conventional model-based OPC (MBOPC) is only focused on patterni
Autor:
Yongchan Ban, Soo-Han Choi, Moon-Hyun Yoo, Ji-Suk Hong, Dong-Hyun Kim, Ki-Hung Lee, Jeong-Taek Kong, Yoo-Hyon Kim
Publikováno v:
ISQED
The increase in pattern complexity due to optical proximity correction (OPC), the tight requirements for critical dimension (CD) control and the difficulties in defect inspections make IC manufacture more expensive. To alleviate the high cost, manufa
Autor:
Ki-Heung Lee, Soo-Han Choi, Ji-Suk Hong, Moon-Hyun Yoo, Dong-Hyun Kim, Yongchan Ban, Yoo-Hyon Kim, Jeong-Taek Kong
Publikováno v:
SPIE Proceedings.
As the lithography process approaches to the low k1 regime, the layout designers are forced to design the litho-friendly layout, which considers the process margin and mask error enhancement factor (MEEF). In addition, the lithography engineers are a
Autor:
Chul-Hong Park, Yoo-Hyon Kim, Soo-Han Choi, Yongchan Ban, Moon-Hyun Yoo, Jeong-Taek Kong, Dong-Hyun Kim, Ji-Suk Hong
Publikováno v:
SPIE Proceedings.
Sub-wavelength lithography has made the OPC (Optical Proximity Correction) technology one of the most precious commodities for the fabrication of semiconductor devices. Highly accurate gate CD (Critical Dimension) control and design rule shrinkage ha
Autor:
Jeong-Taek Kong, Tae-Hwang Jang, Chul-Hong Park, Sang-Uhk Rhie, Dong-Hyun Kim, Yoo-Hyon Kim, Jun-Seong Park, Soo-Han Choi, Moon-Hyun Yoo, Ji-Soong Park
Publikováno v:
ISQED
The hybrid PPC (process proximity correction) has been one of the inevitable methods for the sub-wavelength lithography to satisfy the requirements of CD control and yield improvement. In this paper, an effective methodology for hybrid PPC is present
Publikováno v:
SISPAD '97. 1997 International Conference on Simulation of Semiconductor Processes and Devices. Technical Digest.
Recently, simulation of Chemical Mechanical Polishing (CMP) is becoming more important because planarity and uniformity which are dependent on many dynamic factors are difficult to control. In this paper, a profile simulation environment based on the
Autor:
Kwang-Jae Yoo, Kyung-Hyun Kim, Jeong-Taek Kong, Bo-Yeon Yoon, Young-Kwan Park, Sang-Rok Ha, Yoo-Hyon Kim
Publikováno v:
2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502).
Simulation of chemical-mechanical polishing is important because the chip-level planarity and wafer-level uniformity dependent on many dynamic factors are difficult to control. CHAMPS (chemical mechanical planarization simulator) has been developed f