Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Yonghyuk Jeong"'
Publikováno v:
ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems.
In this paper, the thermal performances of a Chiplet module with different numbers of dies were studied. The Chiplet module was assumed to be placed in the same server system, with the same ambient condition, and using the same heat sink. A thermal s
Publikováno v:
2022 21st IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (iTherm).
Autor:
Michael Liu, Jenn An Wang, JaeMyong Kim, Jae-Pil Kim, Anthony D. Yang, OhYoung Kwon, YongHyuk Jeong, Eric Yang, Eric Ouyang, Susan Lin
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
System-in-Package (SiP) technology has been used for a wide range of electronic devices, but the warpage behavior of the package can be difficult to control and predict due to complex manufacturing parameters and processes [1], [2]. Previous research
Publikováno v:
2020 IEEE 70th Electronic Components and Technology Conference (ECTC).
The current trends of consumer electronics are to make the devices smaller, faster, better performance, and have more functions. To meet these requirements, semiconductor packaging is moving toward system-in-package (SiP) which is to pack a number of
Autor:
Anthony D. Yang, Jim Hsu, Eric Ouyang, YongHyuk Jeong, SeonMo Gu, JaeMyong Kim, Susan Lin, Billy Ahn, Goran Liu
Publikováno v:
International Symposium on Microelectronics. 2018:000344-000348
In this paper, the impact of two different types of warpage, strip warpage and system-in-packages (SiP) module warpage, are considered and studied, both experimentally and numerically. An advanced material characterization method is also conducted to
Autor:
Eric Ouyang, Billy Ahn, SeonMo Gu, Seng Guan Chow, Anonuevo Dexter, YongHyuk Jeong, JaeMyong Kim
Publikováno v:
International Symposium on Microelectronics. 2016:000498-000503
To lower the manufacturing cost of quad flat no-lead (QFN) packages, the number of QFN packages on a leadframe must be increased. However, the increased number of packages or changes to the layout of QFN packages on the leadframe can impact the mold
Autor:
Billy Ahn, Anthony D. Yang, Yonghyuk Jeong, Takahiro Horie, Tetsuya Koyama, Masahiro Tsuriya, Jim Hsu, Jeffrey E. Lee, Kiyoshi Oi
Publikováno v:
2018 International Conference on Electronics Packaging and iMAPS All Asia Conference (ICEP-IAAC).
SiP turns to be complex due to increasing the number of components in a given space, narrow gap between die-to-passive or passive-to-passive and narrow clearance between mold top to components. Therefore, molding process becomes a critical process to
Autor:
Billy Ahn, Tetsuya Koyama, Takahiro Horie, Masahiro Tsuriya, Yonghyuk Jeong, Anthony D. Yang, Jeffrey E. Lee, Jim Hsu, Kiyoshi Oi
Publikováno v:
2018 International Conference on Electronics Packaging and iMAPS All Asia Conference (ICEP-IAAC).
Warpage is one big challenge during manufacturing process for advanced packaging, which needs to be addressed for successful process integration. For these challenges, iNEMI has initiated System-in-Package module warpage project which is to understan
Publikováno v:
International Symposium on Microelectronics. 2012:000809-000817
In this paper, the thermal performance data of theta jc (Rth-JC) and theta ja (Rth-JA) of a flip chip ball grid array device with heat spreader, fcBGA-H, is measured. For Rth-JC, various boundary conditions for the thermal resistance modeling are con
Publikováno v:
2014 IEEE 64th Electronic Components and Technology Conference (ECTC).
For the demand of high density input/output (I/O), finepitch, and low-k materials in copper column bump flip chip packages, Thermal Compression Bonding (TCB) with preapplied Non Conductive Paste (NCP) has been developed in order to ensure manufacturi