Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Yong-Seok Chung"'
Autor:
Yong-Seok Chung
Publikováno v:
The Journal of Developmental Disabilities. 26:23-38
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ddf77316bffeb035c6b69f853f3a58f8
https://doi.org/10.34262/kadd.2022.26.4.38
https://doi.org/10.34262/kadd.2022.26.4.38
Autor:
Yong-Seok Chung
Publikováno v:
The Journal of Developmental Disabilities. 23:97-115
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::85c62817043a35d99c82c2af458e29ba
https://doi.org/10.34262/kadd.2019.23.4.115
https://doi.org/10.34262/kadd.2019.23.4.115
Autor:
Yong-Seok Chung
Publikováno v:
The Journal of Developmental Disabilities. 22:223-248
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5790a4f9a7ab37e6cf53fea6df97f4a8
https://doi.org/10.34262/kadd.2018.22.4.223
https://doi.org/10.34262/kadd.2018.22.4.223
Autor:
Dong-Hwee Hwang, Yong-Sik Kim, Minji Seo, Kyongsik Yeom, Young Ki Hong, Yong Seok Chung, MyeongHee Oh, Jongsung Woo, Young-cheon Jeong, Sungyoung Yoon, Sangjin Lee, Chang-Min Jeon, Dong-Hyun Kim, Jae-Hun Lee, S. L. Cho, D.H. Kim, Ga-Young Lee, Gun Rae Kim, HyunChang Lee, Yong-Kyu Lee, Hyun-Jin Shin
Publikováno v:
2021 IEEE International Memory Workshop (IMW).
Based on robustness of split-gate embedded Flash (eFlash) bit-cell, 28-nm eFlash process with Flash IP (20Mb) and SRAM IP (32Mb) is developed for automotive Grade 1 (G1) application with temperature range of (−40∼150°C) for the first time. In ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::77520e6b5e0c91ff52b383f30b542789
https://doi.org/10.1109/imw51353.2021.9439602
https://doi.org/10.1109/imw51353.2021.9439602
Autor:
Yong-Seok Chung
Publikováno v:
韓國敎會史學會誌. 45:119-154
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2f459535c0ae7c0ac04dddf6a7a7fa68
https://doi.org/10.22254/kchs.2016.45.03
https://doi.org/10.22254/kchs.2016.45.03
Autor:
Sunghee Cho, Min-Su Kim, Jaejune Jang, Kyongsik Yeom, Duck-Hyung Lee, Yong-Seok Chung, Ji-Sung Kim, Kyung-Soo Min, Chang-Min Jeon, Dong-Hyun Kim, Hong-Kook Min, MyeongHee Oh, Jongsung Woo, Hyunug Kang, Bo-Young Seo, Hyo-sang Lee, Yong-Kyu Lee, K. Kim
Publikováno v:
2017 Symposium on VLSI Technology.
We developed a 4Mb split-gate e-flash on 28-nm low-power HKMG logic process, which demonstrates the smallest bit-cell size (0.03×-um2) for high performance IoT applications. High speed operation (25us write time and 2ms erase operation) and robust r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9311b8029e9be398f397fce08defa6a2
https://doi.org/10.23919/vlsit.2017.7998171
https://doi.org/10.23919/vlsit.2017.7998171