Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Yong-Keon Choi"'
Publikováno v:
2012 24th International Symposium on Power Semiconductor Devices and ICs.
a 12V low Vgs (1.8V) RF-N/PLDMOS have been successfully implemented on the 0.18 µm analog CMOS process without thermal budget addition. N- and P-ch LDMOS needs additional body and drift implants, respectively. A short channel length and a small over
Autor:
Il-Yong Park, Nam-Joo Kim, Kwang-Dong Yoo, Mi-Young Kim, Yong-Keon Choi, Chul-Jin Yoon, Lou N. Hutter, Hyun-Chol Lim
Publikováno v:
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs.
A versatile 30V analog CMOS process in a 0.18 μm technology node has been developed by using cost-effective and modular fashion. To reduce the thermal budget deep NWELL isolation is formed after CMOS well formation. The drain-extended (DE) CMOS from
Autor:
Nam-Joo Kim, Il-Yong Park, Nam-Chil Moon, Yong-Keon Choi, Sang-Chul Shim, Bon-Keun Jun, Kwang-Dong Yoo, Kwang-Young Ko
Publikováno v:
8th International Conference on Power Electronics - ECCE Asia.
This paper reviews the technology trends of BCD (Bipolar-CMOS-DMOS) technology in terms of voltage capability, switching speed of power transistor, and high integration of logic CMOS for SoC (System-on-Chip) solution requiring high-voltage devices. R
Autor:
Kwang-Young Ko, Mi Young Kim, Hyun Tae Kim, Il-Yong Park, Hyon-Chol Lim, Chul-Jin Yoon, Kwang-Dong Yoo, Yong-Keon Choi, Yong-Seong Kim, Nam-Joo Kim
Publikováno v:
2009 21st International Symposium on Power Semiconductor Devices & IC's.
We experimentally demonstrate a Super-Junction LDMOS transistor in a 0.18 µm BCD technology. The buffered Super-Junction structure is implemented by the use of existing N- and P-drift layer, which are optimized for conventional 20V to 30V LDMOS tran
Autor:
Kwang-Dong Yoo, Bon-Keun Jun, Kwang-Young Ko, Chul-Jin Yoon, Nam-Joo Kim, Hyon-Chol Lim, Il-Yong Park, Yong-Keon Choi, Mi-Young Kim
Publikováno v:
2008 20th International Symposium on Power Semiconductor Devices and IC's.
We present a new BCD technology in a 0.18 μm technology platforms with a capability of 7 to 60V high-voltage devices such as DEMOS and LDMOS. The developed 0.18 mum BCD process provides various kinds of high voltage LDMOS such as 7, 12, 20, 50, 60 V
Autor:
Yong-Keon Choi, Il-Yong Park, Hyun-Chol Lim, Mi-Young Kim, Chul-Jin Yoon, Nam-Joo Kim, Kwang-Dong Yoo, Hutter, L.N.
Publikováno v:
2011 IEEE 23rd International Symposium on Power Semiconductor Devices & ICs (ISPSD); 2011, p219-222, 4p
Autor:
Il-Yong Park, Yong-Keon Choi, Kwang-Young Ko, Sang-Chul Shim, Bon-Keun Jun, Nam-Chil Moon, Nam-Joo Kim, Kwang-Dong Yoo
Publikováno v:
2011 IEEE 8th International Conference on Power Electronics & ECCE Asia (ICPE & ECCE); 2011, p318-325, 8p
Autor:
Kwang-Young Ko, Il-Yong Park, Yong-Keon Choi, Chul-Jin Yoon, Ju-Hyoung Moon, Kyung-Min Park, Hyon-Chol Lim, Soon-Yeol Park, Nam-Joo Kim, Kwang-Dong Yoo, Hutter, L.N.
Publikováno v:
2010 22nd International Symposium on Power Semiconductor Devices & IC's (ISPSD); 2010, p71-74, 4p
Autor:
Il-Yong Park, Yong-Keon Choi, Kwang-Young Ko, Chul-Jin Yoon, Yong-Seong Kim, Mi-Young Kim, Hyun-Tae Kim, Hyon-Chol Lim, Nam-Joo Kim, Kwang-Dong Yoo
Publikováno v:
2009 21st International Symposium on Power Semiconductor Devices & IC's; 2009, p192-195, 4p
Autor:
Il-Yong Park, Yong-Keon Choi, Kwang-Young Ko, Chul-Jin Yoon, Bon-Keun Jun, Mi-Young Kim, Hyon-Chol Lim, Nam-Joo Kim, Kwang-Dong Yoo
Publikováno v:
2008 20th International Symposium on Power Semiconductor Devices & IC's; 2008, p64-67, 4p