Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Yong Sik Kwak"'
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 70:401-405
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7d7cec2b7f7191c3ca95b5c2439a06ce
https://doi.org/10.1109/tcsii.2022.3212147
https://doi.org/10.1109/tcsii.2022.3212147
Autor:
Ho-Jin Kim, Kang-Il Cho, Gil-Cho Ahn, Seung-Hoon Lee, Jun-Ho Boo, Yong-Sik Kwak, Jae-Geun Lim
Publikováno v:
IEEE Journal of Solid-State Circuits. 56:1197-1206
This article presents a single-trim switched capacitor (SC) CMOS bandgap reference (BGR) for battery monitoring applications. For a single-temperature trimming, $\beta $ -compensation and curvature correction techniques are employed to minimize non-p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d8b368e2bbaf522c5ecd5ea9e02a0b76
https://doi.org/10.1109/jssc.2020.3044165
https://doi.org/10.1109/jssc.2020.3044165
Publikováno v:
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dcba05da61f6b5238be7ed67b7823b75
https://doi.org/10.1109/a-sscc53895.2021.9634767
https://doi.org/10.1109/a-sscc53895.2021.9634767
Autor:
Gil-Cho Ahn, Seung-Hoon Lee, Yong-Sik Kwak, Jun-Sang Park, Jun-Ho Boo, Kang-Il Cho, Ho-Jin Kim
Publikováno v:
A-SSCC
This paper presents a 10-bit 900-MS/s single-channel pipelined successive approximation register (SAR) analog-to-digital converter (ADC). A multiplying digital-to-analog converter (MDAC) using an open-loop amplifier is employed to increase the conver
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c39b0de5a43e5ef224bec3ccd32b1dbf
https://doi.org/10.1109/a-sscc48613.2020.9336103
https://doi.org/10.1109/a-sscc48613.2020.9336103
Publikováno v:
ISOCC
This paper presents a single-loop third-order delta-sigma modulator. It uses delayed feed-forward (FF) architecture to relax the op-amp requirement of the integrators. Noise-coupling technique is employed to obtain third-order noise shaping with two
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b22e0a489a43fe0dd6c1aa25a2c196ef
https://doi.org/10.1109/isocc50952.2020.9332984
https://doi.org/10.1109/isocc50952.2020.9332984
Autor:
Seung-Hoon Lee, Jae-Geun Lim, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn, Yong-Sik Kwak, Jun-Ho Boo
Publikováno v:
VLSI Circuits
This paper presents a single-trim switched-capacitor (SC) CMOS bandgap reference (BGR) for battery monitoring applications. A β-compensation technique, which is used in conjunction with mismatch averaging, and a discrete time (DT) domain curvature c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d9fa8c81abe07f8fa626ddddd758ecd
https://doi.org/10.1109/vlsicircuits18222.2020.9162987
https://doi.org/10.1109/vlsicircuits18222.2020.9162987
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:2772-2782
This paper presents a 2-2 discrete-time (DT) resolution-enhanced sturdy multi-stage noise-shaping (SMASH) delta–sigma modulator. It uses source-follower-based integrators to efficiently increase the operating speed of a DT modulator. A SMASH topolo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ec7a444057b47db4bf8f9dcd8407b328
https://doi.org/10.1109/jssc.2018.2859401
https://doi.org/10.1109/jssc.2018.2859401
Publikováno v:
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE. 18:346-351
A second-order single-bit delta-sigma analog-to-digital converter (ADC) is presented in this paper. An op-amp bias sharing technique is used to reduce the power consumption and active area of the ADC. It achieves 77.5 dB dynamic range over 1 kHz sign
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9eeb10ea1526f749178717b18ee274bc
https://doi.org/10.5573/jsts.2018.18.3.346
https://doi.org/10.5573/jsts.2018.18.3.346
Publikováno v:
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE. 17:800-805
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::318b0fd4756f12f548dac36f00bd774f
https://doi.org/10.5573/jsts.2017.17.6.800
https://doi.org/10.5573/jsts.2017.17.6.800
Publikováno v:
ISOCC
This paper presents a second-order delta-sigma modulator for audio applications. It uses modified feed-forward (FF) architecture that simplifies the switched-capacitor network of an analog adder in front of the quantizer. The modulator utilizes corre
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b9e7e0afa75d3d756d1706a38ab6eb66
https://doi.org/10.1109/isocc47750.2019.9027739
https://doi.org/10.1109/isocc47750.2019.9027739