Zobrazeno 1 - 10
of 18
pro vyhledávání: '"Yogendera Kumar"'
Publikováno v:
Circuits, Systems, and Signal Processing. 37:3995-4014
A digital electrocardiogram (ECG) detector with low power consumption and high performance based on biorthogonal 2.2 wavelet transform and applicable for the modern implantable cardiac pacemakers is proposed in the present work. Biorthogonal 2.2 wave
Publikováno v:
ISA transactions. 81
A high performance QRS complex detector applicable for wearable healthcare devices is proposed in the present work. Since, higher SNR results in better detection accuracy and lesser number of coefficients reduces the hardware resources as well as pow
Publikováno v:
Advances in Intelligent Systems and Computing ISBN: 9789811056864
A robust digital image watermarking method based on Discrete Wavelet Transform (DWT) and Singular Value Decomposition (SVD) is proposed in the present work. In this method, first, the original image of size 256 × 256 is DWT decomposed into the third
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d78f0f4722b5f75b38098a52f896563c
https://doi.org/10.1007/978-981-10-5687-1_3
https://doi.org/10.1007/978-981-10-5687-1_3
Publikováno v:
2017 4th International Conference on Signal Processing, Computing and Control (ISPCC).
One of the most important aspects of the electrocardiogram (ECG) signal processing is the removal of noises from the signals. In the present work a filter bank architecture based on wavelet transform is proposed for this purpose. Proposed design uses
Publikováno v:
2017 International Conference on Computing, Communication and Automation (ICCCA).
Present work proposes a new method for automatic detection of the QRS complex wave of an ECG signal using digital signal processing (DSP) technique. The main focus in this work is to remove the noises that interfere with the ECG signal. For this purp
Autor:
Yogendera Kumar, Himani Mittal
Publikováno v:
2017 International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET).
Network on Chip (NOC) a new design emerging offers a promising architectural choice for future systems on chips. NOC architectures offer a packet switched communication among functional cores on the chip. NOC architectures also apply concepts from co
Publikováno v:
2016 International Conference on Computing, Communication and Automation (ICCCA).
FPGA Based design of area efficient router architecture for NoC is proposed in the present work. Design entry of the proposed router is done using Verilog Hardware Description Language (Verilog HDL). In the designed router four channels (east, west,
Publikováno v:
2016 International Conference on Computing, Communication and Automation (ICCCA).
In this work, a low power dual edge triggered flip flop design using multi threshold CMOS is proposed. Proposed Flip-Flop (FF) has three new feature points. First point, the pulse generation control logic is designed with EXOR gate and inverter chain
Publikováno v:
IEEE Signal Processing Letters. 16:133-136
A robust and power efficient focus measure applicable in digital cameras is proposed. This measure, namely reduced energy-ratio (RER), uses the dc component and the lowest order five AC components of the discrete cosine transform (DCT) and is express
Publikováno v:
IEEE Transactions on Circuits and Systems for Video Technology. 18:1237-1246
A new passive autofocus algorithm consisting of a robust focus measure for object detection and fuzzy reasoning for target selection is presented. The proposed algorithm first detects objects distributed in the image using a mid-frequency discrete co