Zobrazeno 1 - 10
of 92
pro vyhledávání: '"Yizheng Ye"'
Publikováno v:
Journal of Electronic Testing. 27:43-56
In order to further reduce test data storage and test power of deterministic BIST based on scan slice overlapping, this paper proposes a novel optimization approach. Firstly, a san cell grouping method considering layout constraint is introduced to s
Publikováno v:
Integration. 43:81-100
Test data storage, test application time and test power dissipation increase dramatically for single stuck-at faults while tens of million gates are integrated in a System-on-a-Chip (SoC), which makes implementing fault testing for embedded cores bas
Publikováno v:
IEEE Transactions on Electron Devices. 56:1300-1308
In this paper, compact channel noise models valid in all regions of operation for deep-submicron MOSFETs have been developed and experimentally verified. The physics-based expressions for thermal noise and flicker noise and corner frequency constitut
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 55:718-722
In this paper, design techniques for an integrated RF bandpass filter are discussed. A novel wide-tuning high-Q active bandpass filter utilizing the active inductors is presented. Issues of the active inductor related to Q -enhancement, noise, linear
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 16:677-682
A current-recycling technique for shadow-match-line (SML) sensing in content-addressable memories (CAMs) is presented. In order to minimize energy-overhead, a novel current-recycling voltage detector (CRVD) is devised, whose working current is reused
Publikováno v:
2003 5th International Conference on ASIC Proceedings (IEEE Cat No 03TH8690) ICASIC-03.
The decomposition issue of tasks for VLSI simulation on distributed memory multi-computers is discussed in this paper. Mathematical and physical analyses are given for exploiting the parallelisms of these operations. An efficient decomposition algori
Publikováno v:
ISCAS
This paper proposes a novel scheme of self-timed charge recycling search-line (SL) drivers for content-addressable memories. In the conventional charge recycling SL driving scheme [11], an additional clock needs to be generated from the system clock
Publikováno v:
2008 4th International Conference on Wireless Communications, Networking and Mobile Computing.
An exact method is employed to analyze the bit error rate (BER) performances of differential chaos shift keying (DCSK) communication system over fading channels. The exact BER performances of DCSK in Nakagami-m Rayleigh and Rician fading channels are
Publikováno v:
VLSI Design
In this paper, we propose a new spatial and temporal encoding approach for generic on-chip global buses with repeaters that enables higher performance while reducing peak energy and average energy. The proposed encoding approach exploits the benefits
Publikováno v:
2007 7th International Conference on ASIC.
A novel continuous common-mode (CM) voltage sensing circuit is presented for Op-amp with large input swing. It has two stages: the first stage reduces the input swing, and the second detects the CM voltage. The proposed circuit is analyzed in detail.