Zobrazeno 1 - 10
of 28
pro vyhledávání: '"Yiqiang Ding"'
Publikováno v:
Journal of Orthopaedic Surgery and Research, Vol 15, Iss 1, Pp 1-10 (2020)
Abstract Background Although many treatments for ipsilateral proximal and shaft femoral fractures have been developed, controversy exists regarding their optimal management. The purpose of this retrospective study was to discuss the effectiveness of
Externí odkaz:
https://doaj.org/article/9d5eecbad0be4340b364bb508e84319f
Publikováno v:
Journal of Orthopaedic Surgery and Research, Vol 15, Iss 1, Pp 1-10 (2020)
Journal of Orthopaedic Surgery and Research
Journal of Orthopaedic Surgery and Research
BackgroundAlthough many treatments for ipsilateral proximal and shaft femoral fractures have been developed, controversy exists regarding their optimal management. The purpose of this retrospective study was to discuss the effectiveness of the bridge
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::534d88a7fb7acdeb2bfac59107f83d54
https://doi.org/10.21203/rs.3.rs-30949/v2
https://doi.org/10.21203/rs.3.rs-30949/v2
Autor:
Yiqiang Ding, Wei Zhang
Publikováno v:
Journal of Computing Science and Engineering. 9:177-189
High-performance processors using Non-Uniform Cache Architecture (NUCA) are increasingly used to deal with the growing wire delays in multicore/manycore processors. Due to the convergence of high-performance computing with embedded computing, NUCA ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dba8ce5bfa98e5740075cbf628fa53f7
https://doi.org/10.5626/jcse.2015.9.4.177
https://doi.org/10.5626/jcse.2015.9.4.177
Autor:
Yiqiang Ding, Wei Zhang
Publikováno v:
Journal of Computing Science and Engineering. 8:34-42
Time-predictability of computing is critical for hard real-time and safety-critical systems. However, currently there is no metric available to quantitatively evaluate time-predictability, a feature crucial to the design of time-predictable processor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3e0b3919847363889d32589b90abf2ca
https://doi.org/10.5626/jcse.2014.8.1.34
https://doi.org/10.5626/jcse.2014.8.1.34
Publikováno v:
Journal of Computing Science and Engineering. 8:25-33
In this paper, we quantitatively compare two different time-predictable multicore cache architectures, separate and statically-partitioned caches, through extensive simulation. Current research trends primarily focus on partitioned-cache architecture
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::620e5d3aee5ede8c30180766fb6c7b00
https://doi.org/10.5626/jcse.2014.8.1.25
https://doi.org/10.5626/jcse.2014.8.1.25
Autor:
Yiqiang Ding, Wei Zhang
Publikováno v:
Journal of Computing Science and Engineering. 7:285-299
To enable hard real-time systems to take advantage of multicore processors, it is crucial to obtain the worst-case execution time (WCET) for programs running on multicore processors. However, this is challenging and complicated due to the inter-threa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0665cacf3c07613ad0b3d67e71f76de7
https://doi.org/10.5626/jcse.2013.7.4.285
https://doi.org/10.5626/jcse.2013.7.4.285
Publikováno v:
Journal of Computing Science and Engineering. 7:53-66
Bounding the worst-case DRAM performance for a real-time application is a challenging problem that is critical for computing worst-case execution time (WCET), especially for multicore processors, where the DRAM memory is usually shared by all of the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5fc2d710608ddde0481182d6fee60e69
https://doi.org/10.5626/jcse.2013.7.1.53
https://doi.org/10.5626/jcse.2013.7.1.53
Autor:
Wei Zhang, Yiqiang Ding
Publikováno v:
Journal of Computing Science and Engineering. 7:67-80
The worst-case execution time (WCET) of each real-time task in multicore processors with shared caches can be significantly affected by inter-thread cache interferences. The worst-case inter-thread cache interferences are dependent on how tasks are s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cdfa7a276ac3db34833b303634d8b6af
https://doi.org/10.5626/jcse.2013.7.1.67
https://doi.org/10.5626/jcse.2013.7.1.67
Autor:
Yiqiang Ding, Wei Zhang
Publikováno v:
ACM SIGBED Review. 9:6-15
Due to the prohibitive cost of worst-case timing analysis for modern processors, the design of time-predictable processors has become increasingly important for hard real-time and safety-critical systems. However, to the best of our knowledge current
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6712e4e318cfed1fd38e557b608893ac
https://doi.org/10.1145/2452537.2452538
https://doi.org/10.1145/2452537.2452538
Autor:
Wei Zhang, Yiqiang Ding
Publikováno v:
Journal of Computing Science and Engineering. 6:12-25
For real-time systems it is important to obtain the accurate worst-case execution time (WCET). Furthermore, how to improve the WCET of applications that run on multicore processors is both significant and challenging as the WCET can be largely affect
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::424810ee84d6bf39a2755bac2f76cf44
https://doi.org/10.5626/jcse.2012.6.1.12
https://doi.org/10.5626/jcse.2012.6.1.12