Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Yee Chang Fei"'
Publikováno v:
Circuit World, 2019, Vol. 45, Issue 3, pp. 132-140.
Externí odkaz:
http://www.emeraldinsight.com/doi/10.1108/CW-01-2019-0004
Publikováno v:
World Journal of Engineering, 2017, Vol. 14, Issue 4, pp. 342-347.
Externí odkaz:
http://www.emeraldinsight.com/doi/10.1108/WJE-05-2016-0001
Publikováno v:
Advanced Science Letters. 23:5019-5023
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f1d397d5df25377a41f08b7518045618
https://doi.org/10.1166/asl.2017.7301
https://doi.org/10.1166/asl.2017.7301
Autor:
Yee Chang Fei
Publikováno v:
2016 IEEE Student Conference on Research and Development (SCOReD).
This paper provides an introduction about embedded capacitance technology and its implementation on printed circuit board (PCB). The advantages of implementing embedded decoupling capacitance in compact PCB with high speed signal transmission are als
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e5880db53ed329bd44b995b7763b32d5
https://doi.org/10.1109/scored.2016.7810044
https://doi.org/10.1109/scored.2016.7810044
Autor:
Yee Chang Fei
Publikováno v:
2014 2nd International Conference on Electronic Design (ICED).
This paper studies the impact of impedance discontinuity or mismatch contributed by surface mount (SMT) pads of AC coupling capacitor on Printed Circuit Board (PCB) traces with 26 Giga-bit per second (Gbps) transmission and the technique to minimize
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::829b3224ca3c75e0977203999de39228
https://doi.org/10.1109/iced.2014.7015776
https://doi.org/10.1109/iced.2014.7015776
Autor:
Yee Chang Fei
Publikováno v:
2014 2nd International Conference on Electronic Design (ICED).
This paper studies the methodology of power integrity (PI) analysis for high speed printed circuit board (PCB) design. This involves the analysis of AC and DC characteristic of the PCB, and also the loop stability of the switch mode voltage source. B
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2643f2891e915219b34f2c460eb4b0b2
https://doi.org/10.1109/iced.2014.7015785
https://doi.org/10.1109/iced.2014.7015785
Autor:
Yee Chang Fei
Publikováno v:
Fifth Asia Symposium on Quality Electronic Design (ASQED 2013).
This paper analyzes the ability of an optimized via design to achieve higher channel bandwidth by minimizing the impedance discontinuity of a high speed serial link above 5Gbps owing to the parasitic capacitive effect of vias on a single Printed Circ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9574296958fd9051b4ac4927a341aa88
https://doi.org/10.1109/asqed.2013.6643582
https://doi.org/10.1109/asqed.2013.6643582
Akademický článek
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