Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Yaswanth K. Cherivirala"'
Publikováno v:
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
Autor:
Omar Abdelatty, Yaswanth K. Cherivirala, Sumanth Kamineni, Benton H. Calhoun, David D. Wentzloff, Abdullah Alghaihab
Publikováno v:
2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
This paper presents a $300\mu \mathrm{W}$ backchannel receiver (RX) compatible with the Bluetooth-Low-Energy (BLE) standard for ultra-low power Internet-of-Things (IoT) applications. A PLL-less, mixer-first zero-IF architecture is proposed to achieve
Publikováno v:
SPE Journal. 24:1830-1838
Summary The onset of the era of internet of things and artificial intelligence comes with the ever-growing demand for self-sustaining and efficient sensors. Sensors based on complementary metal oxide semiconductors (CMOSs) have attracted significant
Autor:
Wenbo Duan, Morteza Fayazi, Ronald G. Dreslinski, Kyumin Kwon, Sumanth Kamineni, Jeongsup Lee, Chien-Hen Chen, Dennis Sylvester, Benton H. Calhoun, Mehdi Saligane, David D. Wentzloff, David Blaauw, Yaswanth K. Cherivirala, Tutu Ajayi, Shourya Gupta
Publikováno v:
VLSI-SoC: Design Trends ISBN: 9783030816407
VLSI-SoC (Selected Papers)
VLSI-SoC (Selected Papers)
This chapter presents the world’s first autonomous mixed-signal SoC framework, driven entirely by user constraints, along with a suite of automated generators for analog blocks. The process-agnostic framework takes high-level user intent as inputs
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ce1fd6cac2ce8ed5252c6a70d983d76c
https://doi.org/10.1007/978-3-030-81641-4_4
https://doi.org/10.1007/978-3-030-81641-4_4
Autor:
Kyumin Kwon, Sumanth Kamineni, Chien-Hen Chen, Morteza Fayazi, Benton H. Calhoun, Shourya Gupta, Mehdi Saligane, Dennis Sylvester, Tutu Ajayi, Yaswanth K. Cherivirala, David Blaauw, David D. Wentzloff, Ronald G. Dreslinski
Publikováno v:
VLSI-SOC
We present the world's first autonomous mixed-signal SoC framework, driven entirely by user constraints, along with a suite of automated generators for analog blocks. The process-agnostic framework takes high-level user intent as inputs to generate o
Autor:
Tutu Ajayi, Yaswanth K Cherivirala, Kyumin Kwon, Sumanth Kamineni, Saligane, Mehdi, Fayazi, Morteza, Shourya Gupta, Chien-Hen Chen, Sylvester, Dennis, Blaauw, David, Dreslinski, Ronald, Calhoun, Benton H, Wentzloff, David D
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9a816791006a8b501acac4d96c3f8741