Zobrazeno 1 - 10
of 107
pro vyhledávání: '"Yaqing Chi"'
Publikováno v:
IET Circuits, Devices and Systems, Vol 15, Iss 2, Pp 136-140 (2021)
Abstract Current mirror utilizing an extra transistor for single‐event‐induced charge dissipation is proposed. This technique involves two inverters and a dissipation transistor. The inverters are employed as a sensor that turns on the dissipatio
Externí odkaz:
https://doaj.org/article/756fd1ece84d48909408da980c83f892
Publikováno v:
IEEE Access, Vol 7, Pp 47955-47961 (2019)
A fault-tolerant hardening-by-design frequency divider has been proposed for clock and data recovery in a 28-nm CMOS process. By means of the mandatory updating mechanism, the proposed divider can update the state of the D flip-flops from an error st
Externí odkaz:
https://doaj.org/article/428016c81ffb412bbc78c64d6657d82b
Publikováno v:
Materials Research Express, Vol 9, Iss 9, p 096301 (2022)
To mitigate the sensitivity of the charge pump in a traditional Phase-Locked Loop(PLL), a single-event-hardened PLL architecture with a proportional and integral path is proposed. The phase margin of the PLL is kept at 58.16° due to the rational des
Externí odkaz:
https://doaj.org/article/a68d8ffde3464a60b5a3f9c4d48138e1
Publikováno v:
Symmetry, Vol 12, Iss 4, p 624 (2020)
The reliability of integrated circuits under advanced process nodes is facing more severe challenges. Single-event transients (SET) are an important cause of soft errors in space applications. The SET caused by heavy ions in the 28 nm bulk silicon in
Externí odkaz:
https://doaj.org/article/e8888051f150464ea926a8ccdb2d60dd
Publikováno v:
Applied Sciences, Vol 9, Iss 17, p 3475 (2019)
Sensitive volume thickness for silicon on insulator (SOI) devices has scaled to the point that energy loss straggling cannot be ignored within the development of the manufacturing process. In this study, irradiation experiments and Geant4 simulation
Externí odkaz:
https://doaj.org/article/7ae4446ccb804238a2c8c656d0a120c4
Publikováno v:
Symmetry, Vol 11, Iss 6, p 793 (2019)
Based on three-dimensional (3D) technology computer aided design (TCAD) simulations, the supply voltage and temperature dependence of single-event transient (SET) pulse width in 28-nm fully-depleted silicon-on-insulator (FDSOI) metal-oxide-semiconduc
Externí odkaz:
https://doaj.org/article/a2cc5c63a6d64788aad35abecfaaccd6
Akademický článek
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Publikováno v:
IEEE Transactions on Nuclear Science. 69:1141-1147
Autor:
Qiangguo Zhao, Jingtian Liu, BIn Liang, Jianjun Chen, Yaqing Chi, Deng Luo, Yang Guo, Hanhan Sun
This paper proposes a radiation-hardened-by-design (RHBD) technique targeting single-event transient (SET) mitigation in bandgap reference (BGR) circuits. The dual modular redundancy (DMR) technique used for BGR ensures correct output voltage to the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d59832514deccd01c4b24296d8e14a81
https://doi.org/10.22541/au.167271547.72561115/v1
https://doi.org/10.22541/au.167271547.72561115/v1
Autor:
Shengyu Song, Yang Guo, Hengzhou Yuan, Jianjun Chen, Bin Liang, Yaqing Chi, Jingtian Liu, Qian Sun
Publikováno v:
IEEE Transactions on Nuclear Science. 68:2717-2723
Single-event transient (SET) glitches can be modified by body-biasing controlling techniques. In this paper, a body-biasing configuration is proposed in combinational circuits, which plays no role during devices’ normal operation, but significantly