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Publikováno v:
2011 IEEE/SEMI Advanced Semiconductor Manufacturing Conference.
Accelerated design rule (DR) shrinkage is introducing new challenges to the world of process control, yield monitoring and wafer inspection (WI). One of the main challenges of WI is the detection of small defects below the optical resolution limit of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dc93ebf3e7b094f6a3f82eb45f41deca
https://doi.org/10.1109/asmc.2011.5898182
https://doi.org/10.1109/asmc.2011.5898182
