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pro vyhledávání: '"Ya-Lu Cao"'
Publikováno v:
ECS Transactions. 34:743-748
Shallow Trench Isolation(STI) is widely used in advanced CMOS technologies. This paper describes a shallow trench isolation for 0.13μm CMOS technologies development which utilizes AMAT Ultima Plus High Density Plasma (HDP) CVD oxide process to fill
Publikováno v:
ECS Transactions. 34:787-792
The influence of the SiN cap-layer deposition process including different pre-clean treatments on the voltage breakdown (VBD) and electromigration (EM) behavior of copper dual damascene metallization has been studied. A remarkable improvement for vol