Zobrazeno 1 - 9 of 9 pro vyhledávání: '"Xinxuan Tao"'
2
HBCA: A Toolchain for High-Accuracy Branch-Fused CNN Accelerator on FPGA with Dual-Decimal-Fused Technique
Autor: Zhengjie Li, Lingli Hou, Xinxuan Tao, Jian Wang, Jinmei Lai
Publikováno v: Electronics; Volume 12; Issue 1; Pages: 192
The programmability of FPGA suits the constantly changing convolutional neural network (CNN). However, several challenges arise when the previous FPGA-based accelerators update CNN. Firstly, although the model of RepVGG can balance accuracy and speed
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::12cc112e8bf16cbf55207d84699e7639
https://doi.org/10.3390/electronics12010192
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3
Design and Implementation of DDR3 SDRAM Controller
Autor: Xing Wang, Jian Wang, Jinmei Lai, Xinxuan Tao, Meng Yang
Publikováno v: 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
This paper implements the memory controller and its PHY layer on the FPGA according to the DDR3 timing requirements. Successive comparison algorithm this paper proposes and Digital Clock Manager(DCM) are used to realize fast and accurate write leveli
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::30f3612bb5f839c2f393633ee407c262
https://doi.org/10.1109/icsict.2018.8564837
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4
Timing Model For GRM FPGA Based Routing
Autor: zhu-jun Qi, Li-Ran Hu, Jinmei Lai, Xinxuan Tao, Jian Wang, Meng Yang, Qinghua Duan
Publikováno v: 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
A delay model is presented in this paper to estimate path delay during routing for GRM based FPGA. The model is linear, and factors like the structure of interconnect switch, wire length, load are analyzed to estimate the delay. In contrast to Elmore
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::cbce26c782512f4abdb1b88717c4d6a0
https://doi.org/10.1109/icsict.2018.8565010
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5
Research on Circuit-Level Design of High Performance and Low Power FPGA Interconnect Circuits in 28nm Process
Autor: Jiqing Xu, Meng Yang, Jian Wang, Xinxuan Tao, Yufan Zhang, Yunbing Pang, Jinmei Lai
Publikováno v: 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
Since the interconnect resources in FPGA cost more than 70% of the chip area, signal delay and power, it plays a crucial role in the implementation of high performance and lower power FPGA to improve performance and reduce power of the interconnect r
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::b00524d82b72ef9b0deaac5b61e5c25a
https://doi.org/10.1109/icsict.2018.8564894
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6
Design of High-Speed Data Transmission System for IC Test
Autor: Jian Wang, Jiabao Gao, Jinmei Lai, Xinxuan Tao
Publikováno v: 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
Based on the embedded Linux system, this paper studies the high-speed data transmission system for the IC test. The AXI4 Burst interface module between DDR and FIFO is designed by using data transmission segmentation method, which can minimize the tr
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::39df9100e66e769fe635a154e77fe54b
https://doi.org/10.1109/icsict.2018.8565757
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7
A Standalone FPGA-test Platform with Bi-directional Ports Supported
Autor: Jinmei Lai, Jian Wang, Xinxuan Tao, Hao Deng
Publikováno v: 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
This paper presents a design of a standalone FPGA-test platform based on MicroBlaze to configure a FPGA and then test it automatically by a command-data flow without users’ interference. Since the test system is built on another FPGA on BR0101, a s
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::81f396c2eb429da3335d3d50352769b6
https://doi.org/10.1109/icsict.2018.8565013
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8
A FPGA-based Hardware Accelerator for Multiple Convolutional Neural Networks
Autor: Xinxuan Tao, Qinghua Duan, Jian Wang, Meng Yang, Zhiqian Zhang, Jinmei Lai, Yuchen Yao, Jiabao Gao
Publikováno v: 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
Convolution Neural Network (CNN) has been widely used in many computer vision tasks. Due to the rapid growth of CNN, the accelerator that only supports single network could not meet the requirement of application. Based on the work of ZynqNet, which
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::c8997f1c06a38ff23cb8746af5c1e1e1
https://doi.org/10.1109/icsict.2018.8565657
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9
Research on Design and Test Method of High Performance 6 Input LUT
Autor: Yunbing Pang, Meng Yang, Yufan Zhang, Xinxuan Tao, Jiqing Xu, Jian Wang, Jinmei Lai
Publikováno v: 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
FPGA devices are becoming more widely used in various industries due to their field-programmable features. Its basic unit in configurable logic block(CLB) is the look-up table(LUT), which takes the important part in whole path delay. Most of the prev
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::cff881ae11ba8b3f26d227ba114fb02d
https://doi.org/10.1109/icsict.2018.8564803
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