Zobrazeno 1 - 10
of 224
pro vyhledávání: '"Xiaolang Yan"'
Publikováno v:
IEEE Access, Vol 7, Pp 54372-54389 (2019)
Fine-grained task models can exploit parallelism to achieve high performance for multiprocessor system-on-chip (MPSoC). However, fine-grained models face the issues of high-communication overhead and difficult scheduling decisions, and the two challe
Externí odkaz:
https://doaj.org/article/553a3aed245841569ec19cc780a6d062
Publikováno v:
IEEE Access, Vol 6, Pp 18771-18785 (2018)
Fine-grained multithreaded models can provide more opportunities for system performance improvements, but they face large amount of communication overhead. To reduce the communication overhead to improve performance, message aggregation and communica
Externí odkaz:
https://doaj.org/article/68c12bea596b463eb768129c62639a27
Autor:
Kai Huang, Xiaowen Jiang, Xiaomeng Zhang, Rongjie Yan, Ke Wang, Dongliang Xiong, Xiaolang Yan
Publikováno v:
IEEE Access, Vol 6, Pp 57614-57630 (2018)
Energy saving and system reliability are two crucial issues for designing modern multiprocessor systems. There has been reliability-aware power management with dynamic voltage-frequency scaling (DVFS) schemes in recent studies. However, they are limi
Externí odkaz:
https://doaj.org/article/0a9f53da484a4bbb9f3ab13931d5a7ed
Publikováno v:
Journal of Electrical and Computer Engineering, Vol 2015 (2015)
Functional verification has become one of the main bottlenecks in the cost-effective design of embedded systems, particularly for symmetric multiprocessors. It is estimated that verification in its entirety accounts for up to 60% of design resources,
Externí odkaz:
https://doaj.org/article/1c75bc035ed6419b9faf52b51acfb5c8
Autor:
Kai Huang, Bowen Li, Dongliang Xiong, Haitian Jiang, Xiaowen Jiang, Xiaolang Yan, Luc Claesen, Dehong Liu, Junjian Chen, Zhili Liu
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 28:1-24
Deep Neural Networks (DNNs) have achieved remarkable success in various Artificial Intelligence applications. Quantization is a critical step in DNNs compression and acceleration for deployment. To further boost DNN execution efficiency, many works e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::447b379872d63fcf7fc1256b86758a6a
https://doi.org/10.1145/3549535
https://doi.org/10.1145/3549535
Autor:
Kai Huang, Bowen Li, Siang Chen, Luc Claesen, Wei Xi, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong, Xiaolang Yan
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 42:190-203
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3cd67946319f2503c34cf4ef2400649c
https://doi.org/10.1109/tcad.2022.3168506
https://doi.org/10.1109/tcad.2022.3168506
Publikováno v:
IEEE Transactions on Sustainable Computing. 6:398-411
Energy optimization plays an increasingly critical role in designing an embedded real-time multiprocessor System on Chip (MPSoC). Dynamic Voltage Frequency Scaling (DVFS) and Dynamic Power Management (DPM) are preferable techniques to optimize energy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b8925b5e77430b21864264b6141c374
https://doi.org/10.1109/tsusc.2018.2853621
https://doi.org/10.1109/tsusc.2018.2853621
Publikováno v:
IEICE Transactions on Information and Systems. :2272-2275
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::131b503e0c4377ffcacdab056d86a591
https://doi.org/10.1587/transinf.2019edl8097
https://doi.org/10.1587/transinf.2019edl8097
Autor:
Kai Huang, Xiaomeng Zhang, Xiaowen Jiang, Xiaolang Yan, Lisane Brisolara, Dandan Zheng, Ahmed Amine Jerraya, Min Yu
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38:1744-1757
Task mapping has been a hot topic in multiprocessor system-on-chip software design for decades. During the mapping process, load balance (LB) and communication optimization have been two important performance optimization factors. This paper studies
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::05d49b1c282db8e8e83e6625dbaf9d91
https://doi.org/10.1109/tcad.2018.2859400
https://doi.org/10.1109/tcad.2018.2859400
Publikováno v:
IEEE Access, Vol 7, Pp 54372-54389 (2019)
Fine-grained task models can exploit parallelism to achieve high performance for multiprocessor system-on-chip (MPSoC). However, fine-grained models face the issues of high-communication overhead and difficult scheduling decisions, and the two challe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7e78dc9bf938132ae566ce1535cbfd87
https://doi.org/10.1109/access.2019.2911653
https://doi.org/10.1109/access.2019.2911653