Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Xiao Zong Huang"'
Publikováno v:
DEStech Transactions on Computer Science and Engineering.
In an environment for verifying digital designs, constrained random verification is employed to create lots of scenarios that help to uncover deep-rooted bugs in the design. Analog blocks such as Analog-to-Digital Converters (ADC), voltage regulators
Publikováno v:
DEStech Transactions on Engineering and Technology Research.
With the development of integrated circuit design into 65nm process, interconnect delay has become one of the key factors that hinder the convergence of time sequence. Firstly, the determinants of interconnect delay are analyzed by Elmore delay model
Publikováno v:
Applied Mechanics and Materials. :3682-3685
An integrated ramp generator is presented in this paper. For traditional implementations, the amplitude clamp is realized with zener diode to limit the output voltage to ±VZ, while the zener diode is not available for standard CMOS process. The tran
Publikováno v:
Applied Mechanics and Materials. :3678-3681
A multiplexer with split devices for high channel isolation was proposed in this paper. The multiplexer is the most essential circuitry for multi-channel video signal acquisition systems. In the multi-channel applications, high isolation performance
Publikováno v:
Applied Mechanics and Materials. :1649-1653
The classical model in digital DC-DC converter is digital pulse width mode (DPWM), but the digital pulse frequency mode (DPFM) is very important in DC-DC converter with light load. This paper presents the different application environments and the ef
Publikováno v:
Applied Mechanics and Materials. :2688-2692
The design of digital-analog mixed SoC involves RF/analog and digital domains, how to effectively improve the design reliability and to reduce the development cycles has become a research hotspot. This paper establishes the appropriate behavioral mod
Publikováno v:
Applied Mechanics and Materials. :1645-1648
This paper presents a low-voltage differential operational transconductance amplifier (OTA) with enhanced DC gain and slew-rate. Based on the current mirror OTA topology, the optimization techniques are discussed in this work. The proposed structure
Publikováno v:
Applied Mechanics and Materials. 251:206-209
A fully integrated CMOS receiver front-end with digital output for optical signal processing system is presented. This circuit is composed of trans-impedance amplifier (TIA) for weak optical current detection, post-amplifier for both a linear and lim
Publikováno v:
Analog Integrated Circuits and Signal Processing. 66:61-66
This paper presents a low power passive UHF RFID transponder IC, which is compatible with ISO/IEC 18000-6B Standard, operating at the 915 MHz ISM band with the total supply current consumption less than 10 μA. The fully integrated passive transponde
Publikováno v:
Analog Integrated Circuits & Signal Processing; Jan2011, Vol. 66 Issue 1, p61-66, 6p, 3 Black and White Photographs, 1 Chart, 9 Graphs