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pro vyhledávání: '"Xavier Jonsson"'
Publikováno v:
Journal of Mathematics in Industry, Vol 8, Iss 1, Pp 1-23 (2018)
Abstract The dimension of transistors shrinks with each new technology developed in the semiconductor industry. The extreme scaling of transistors introduces important statistical variations in their process parameters. A large digital integrated cir
Externí odkaz:
https://doaj.org/article/ff28b44113de41b7aabb8ce6124177b7
Publikováno v:
Scientific Computing in Electrical Engineering ISBN: 9783030441005
The yield of an Integrated Circuit (IC) is commonly expressed as the fraction (in %) of working chips overall manufactured chips and often interpreted as the failure probability of its analog blocks. We consider the Importance Sampling Monte Carlo (I
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a199bbae107dfd35ca67a1954c047d74
https://doi.org/10.1007/978-3-030-44101-2_22
https://doi.org/10.1007/978-3-030-44101-2_22
Publikováno v:
Journal of Mathematics in Industry, Vol 8, Iss 1, Pp 1-23 (2018)
Journal of Mathematics in Industry, 8(1):8:11. Springer
Journal of Mathematics in Industry, 8(1):8:11. Springer
The dimension of transistors shrinks with each new technology developed in the semiconductor industry. The extreme scaling of transistors introduces important statistical variations in their process parameters. A large digital integrated circuit cons
Publikováno v:
2017 IEEE 21st Workshop on Signal and Power Integrity, SPI 2017-Proceedings
We consider the Importance Sampling Monte Carlo (ISMC) as a reference probability estimator for estimating very small probabilities in the context of analog circuits design. We propose a surrogate based hybrid ISMC method to accelerate the estimation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::042ac9413653f59baea1215bab4e3df5
https://research.tue.nl/en/publications/701584ab-08cc-45dc-8a30-bdd03decbe4b
https://research.tue.nl/en/publications/701584ab-08cc-45dc-8a30-bdd03decbe4b
Autor:
Jean-Christophe Lafont, Faress Tissafi Drissi, Lorenzo Ciampolini, Xavier Jonsson, David Turgis, Jean-Paul Morin, Joseph Nguyen, Cyril Descleves
Publikováno v:
ICCAD
We consider the general problem of the efficient and accurate determination of the yield of an integrated circuit, through electrical circuit level simulation, under variability constraints due to the manufacturing process. We demonstrate the perform