Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Xavier Baraton"'
Autor:
Pandi C. Marimuthu, Yaojian Lin, Xavier Baraton, Yonggang Jin, Jerome Teysseyre, Seung Wook Yoon
Publikováno v:
Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT). 2012:001507-001526
Current and future demands of mobile/portable electronic systems in terms of performance, power consumption, reliable system at a reasonable price are met by developing advanced/appropriate silicon process technology, innovative packaging solutions w
Publikováno v:
Microelectronics Reliability. 50:1014-1020
Interface delamination during solder reflow is a critical reliability problem for the plastic IC packages. The main objective of this study is to apply modified virtual crack closure method (MVCCM) for the analysis of interface delamination between t
Publikováno v:
Microelectronics Reliability. 43:741-749
In the flip-chip ball grid array (FCBGA) assembly process, no-flow underfill has the advantage over traditional capillary-flow underfill on shorter cycle time. Reliability tests are performed on both unmolded and molded FCBGA with three different typ
Autor:
Seung Wook Yoon, Yonggang Jin, Xavier Baraton, Jerome Teysseyre, Pandi C. Marimuthu, Yaojian Lin
Publikováno v:
2012 IEEE 62nd Electronic Components and Technology Conference.
The shrinkage of the pitches and pads at the chip to package interface is happening much faster than the shrinkage at the package to board interface. This interconnection gap requires fan-out packaging, where the package size is larger than the chip
Autor:
Seung Wook Yoon, Pandi C. Marimuthu, Yonggang Jin, Jerome Teysseyrex, Yaojian Lin, Xavier Baraton
Publikováno v:
2011 IEEE 13th Electronics Packaging Technology Conference.
The shrinkage of the pitches and pads at the chip to package interface is happening much faster than the shrinkage at the package to board interface. This interconnection gap requires fan-out packaging, where the package size is larger than the chip
Autor:
Xavier Baraton, Pandi C. Marimuthu, Sharma Gaurav, Yonggang Jin, Yaojian Lin, V. P. Ganesh, Seung Wook Yoon, Thorsten Meyer, Andreas Bahr
Publikováno v:
2011 IEEE 61st Electronic Components and Technology Conference (ECTC).
Integrated Circuits fabricated on silicon are assembled in different forms of electronic packages and are used extensively in electronic products such as personal, portable, healthcare, entertainment, industrial, automotive, environmental and securit
Autor:
Yonggang Jin, Andreas Bahr, Xavier Baraton, Thorsten Meyer, Yaojian Lin, S. W. Yoon, Pandi C. Marimuthu, V. P. Ganesh
Publikováno v:
2010 12th Electronics Packaging Technology Conference.
Demand for wafer level packaging (WLP) is being driven by the need to shrink package size and height, simplify the supply chain and provide a lower overall cost by using the infrastructure of a batch process. “Fan-in” (FI)-WLP typically has a lim
Autor:
Xavier Baraton
Publikováno v:
2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT).
Mobile electronics growth has recently been supported by the integration of more features for higher end devices. Smart phones are indeed growing at much faster pace than the overall mobile phone market. Requirements towards packaging are therefore a
Publikováno v:
2009 11th Electronics Packaging Technology Conference.
After encapsulation, thermo-mechanical deformation builds up within the electronic packages due to temperature coefficient of expansion mismatch between the respective materials within the package as it cools to room temperature. The maximum Von Mise
Publikováno v:
2009 11th Electronics Packaging Technology Conference.
Fan-out embedded wafer level ball grid array (eWLB) is a very promising packaging technology with many advantages in comparison to standard Ball Grid Array Packages and leadframe based packages because of smaller size, better electrical and thermal p