Zobrazeno 1 - 10
of 202
pro vyhledávání: '"Wu, Jinyuan"'
ETROC1: The First Full Chain Precision Timing Prototype ASIC for CMS MTD Endcap Timing Layer Upgrade
Autor:
Huang, Xing, Sun, Quan, Gong, Datao, Gwak, Piljun, Kim, Doyeong, Lee, Jongho, Liu, Chonghan, Liu, Tiankuan, Liu, Tiehui, Los, Sergey, Miryala, Sandeep, Nanda, Shirsendu, Olsen, Jamieson, Sun, Hanhan, Wu, Jinyuan, Ye, Jingbo, Ye, Zhenyu, Zhang, Li, Zhang, Wei
We present the design and characterization of the first full chain precision timing prototype ASIC, named ETL Readout Chip version 1 (ETROC1) for the CMS MTD endcap timing layer (ETL) upgrade. The ETL utilizes Low Gain Avalanche Diode (LGAD) sensors
Externí odkaz:
http://arxiv.org/abs/2404.14207
Representation learning for the electronic structure problem is a major challenge of machine learning in computational condensed matter and materials physics. Within quantum mechanical first principles approaches, Kohn-Sham density functional theory
Externí odkaz:
http://arxiv.org/abs/2404.14601
Autor:
Wu, Jinyuan
In pixelized detectors, reducing power consumption in the front end ASIC chips becomes a crucial demand. Optimization based on mature pre-amplifier schemes today is unlikely to bring sufficient improvements. A new CMOS front-end gain stage topology w
Externí odkaz:
http://arxiv.org/abs/2305.10208
Autor:
Wu, Jinyuan
In high energy physics experiment trigger systems, track segment seeding is a resource consuming function and the primary reason is the computing complexity of the segment finding process. As the Moore's Law is reaching its physical limit, reducing c
Externí odkaz:
http://arxiv.org/abs/2305.09834
Autor:
Zhou, Mengqing1 (AUTHOR), Wu, Jinyuan1 (AUTHOR), Wu, Lin1 (AUTHOR), Sun, Xiao1 (AUTHOR), Chen, Congying1 (AUTHOR) chcy75@hotmail.com, Huang, Lusheng1 (AUTHOR) LushengHuang@hotmail.com
Publikováno v:
BMC Microbiology. 10/9/2024, Vol. 24 Issue 1, p1-10. 10p.
Publikováno v:
In International Journal of Gastronomy and Food Science September 2024 37
Autor:
Wu, Jinyuan
In high energy physics experiment trigger systems, block memories are utilized for various purposes, especially in binned searching algorithms. In these algorithms, the storages are demanded to perform like a large set of registers. The writing and r
Externí odkaz:
http://arxiv.org/abs/2112.00831
Autor:
Sun, Quan, Dogra, Sunil M., Edwards, Christopher, Gong, Datao, Gray, Lindsey, Huang, Xing, Joshi, Siddhartha, Lee, Jongho, Liu, Chonghan, Liu, Tiehui, Liu, Tiankuan, Los, Sergey, Moon, Chang-Seong, Oh, Geonhee, Olsen, Jamieson, Ristori, Luciano, Sun, Hanhan, Wang, Xiao, Wu, Jinyuan, Ye, Jingbo, Ye, Zhenyu, Zhang, Li, Zhang, Wei
The analog front-end for the Low Gain Avalanche Detector (LGAD) based precision timing application in the CMS Endcap Timing Layer (ETL) has been prototyped in a 65 nm CMOS mini-ASIC named ETROC0. Serving as the very first prototype of ETL readout chi
Externí odkaz:
http://arxiv.org/abs/2012.14526
Autor:
Zhang, Wei, Sun, Hanhan, Edwards, Christopher, Gong, Datao, Huang, Xing, Liu, Chonghan, Liu, Tiankuan, Liu, Tiehui, Olsen, Jamieson, Sun, Quan, Sun, Xiangming, Wu, Jinyuan, Ye, Jingbo, Zhang, Li
We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be a part of the readout ASIC, called ETROC, to read out Low-Gain Avalanche Detectors (LGADs) for the CMS Endcap Timing Layer (ETL) of High-Luminosity LHC upgra
Externí odkaz:
http://arxiv.org/abs/2011.01222
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