Zobrazeno 1 - 10
of 28
pro vyhledávání: '"Worst-case timing analysis"'
Autor:
Ahlem Mifdaoui, Frederic Giroudot
Publikováno v:
RTSS
Worst-case timing analysis of Networks-on-Chip (NoCs) is a crucial aspect to design safe real-time systems based on manycore architectures. In this paper, we present some potential extensions of our previously-published buffer-aware worst-case timing
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5cec963d28c9300864de6af3c9c10304
https://oatao.univ-toulouse.fr/21389/
https://oatao.univ-toulouse.fr/21389/
Autor:
Giroudot, Frédéric
Monoprocessor architectures have reached their limits in regard to the computing power they offer vs the needs of modern systems. Although multicore architectures partially mitigate this limitation and are commonly used nowadays, they usually rely on
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::9ccfebe67487e3f18c3d5bcd5503e206
https://oatao.univ-toulouse.fr/25921/
https://oatao.univ-toulouse.fr/25921/
Publikováno v:
Frontiers of Information Technology & Electronic Engineering. 16:1018-1033
Multi-core homogeneous processors have been widely used to deal with computation-intensive embedded applications. However, with the continuous down scaling of CMOS technology, within-die variations in the manufacturing process lead to a significant s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54b53a74b5e20c3a0199400226aff97e
https://doi.org/10.1631/fitee.1500035
https://doi.org/10.1631/fitee.1500035
Autor:
Frederic Giroudot, Ahlem Mifdaoui
Publikováno v:
RTAS
—Conducting worst-case timing analyses for wormhole Networks-on-chip (NoCs) is a fundamental aspect to guarantee real-time requirements, but it is known to be a challenging issue due to complex congestion patterns that can occur. In that respect, w
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7c3ffc5016432e83a5565802256784e5
https://doi.org/10.1109/rtas.2018.00010
https://doi.org/10.1109/rtas.2018.00010
Publikováno v:
RTNS
Many-core systems enable the concurrent execution of dynamic mixes of applications on a shared set of dynamically available resources. Predictable execution of real-time applications requires timing guarantees to ensure the satisfaction of the real-t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::36ba8809e9c123a9d0c6a96b97f15e7e
https://doi.org/10.1145/3139258.3139278
https://doi.org/10.1145/3139258.3139278
Akademický článek
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Conference
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Publikováno v:
Real-Time Systems. 11:145-171
This paper describes SPATS—a new toolset for the development of safety-critical and hard real-time systems. SPATS integrates the analysis traditionally offered by program proof and static timing analysis tools through analysis of program basic-path
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::704026e1fcce982ca1bd9f37eda519da
https://doi.org/10.1007/bf00365316
https://doi.org/10.1007/bf00365316
Publikováno v:
Microprocessing and Microprogramming. 40:681-684
Predictable performance is crucial for real-time computing systems. We propose a buffered threaded prefetch scheme as a predictable and high performance instruction memory hierarchy. We also give extensions to the timing schema[3] to analyze the timi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::569959e185c546907f384b6dd2adc713
https://doi.org/10.1016/0165-6074(94)90017-5
https://doi.org/10.1016/0165-6074(94)90017-5
Publikováno v:
ACM SIGAda Ada Letters. :88-91
This paper describes recent work on static timing analysis of Ada. Previous work on static timing analysis has not considered Ada, so one goal of this paper is to raise awareness of the topic within the Ada community. We believe the technology is now
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5e563cc9fa7b97cfe861ffb22a6cf90d
https://doi.org/10.1145/192867.192873
https://doi.org/10.1145/192867.192873