Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Woong Sun Lee"'
Publikováno v:
Polymer Testing, Vol 125, Iss , Pp 108140- (2023)
The warpage behavior of electronic packages has become complicated in recent years owing to the miniaturization and heterogeneous integration technologies. Therefore, stress analyses through warpage simulations have become increasingly challenging. U
Externí odkaz:
https://doaj.org/article/c84821515baf436fa3cd10c022c67be7
Autor:
Sang-Joon Lim, Heung-Jae Shin, Jong-Tae Lee, Woong-Sun Lee, Qwan-Ho Chung, Jung-Kwon Park, Kwang-Yoo Byun
Publikováno v:
International Symposium on Microelectronics. 2011:000887-000890
Recently, mobile age is blooming and makes change of 21st century. Especially multi chip package – MCP- is located center position of this flash era. Moreover, radio frequency –RF- sensitivity determines the product quality and life, therefore we
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6e8aa304b5d7473886d5c8ac0d4ed0c5
https://doi.org/10.4071/isom-2011-tha1-paper2
https://doi.org/10.4071/isom-2011-tha1-paper2
Publikováno v:
Microelectronics Reliability. 48:1052-1061
In this paper, the material properties of anisotropic conductive films (ACFs) and ACF flip chip assembly reliability for a NAND flash memory application were investigated. Measurements were taken on the curing behaviors, the coefficient of thermal ex
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::29430f4cf785a5cf7a7286d1a1087768
https://doi.org/10.1016/j.microrel.2008.03.002
https://doi.org/10.1016/j.microrel.2008.03.002
Autor:
Woong Sun Lee, Jin Yu
Publikováno v:
Diamond and Related Materials. 14:1647-1653
General underfill for the flip-chip package had a low thermal conductivity of about 0.2 W/mK. Thermal properties of underfill were measured with various fillers, such as silica, alumina, boron nitride, (BN) and diamond. Coefficient of thermal expansi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c34769f38786cdcf78d6743abc4db567
https://doi.org/10.1016/j.diamond.2005.05.008
https://doi.org/10.1016/j.diamond.2005.05.008
Publikováno v:
2013 IEEE International Interconnect Technology Conference - IITC.
Recently, three-dimensional stacked chip package using through-silicon vias (TSVs) is a major paradigm which leads the transition of semiconductor technology from 2-D to 3-D IC in the electronic industry. However, lots of reliability concerns lie in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9e8ce86bc48e90fa5a8795db88a6413b
https://doi.org/10.1109/iitc.2013.6615583
https://doi.org/10.1109/iitc.2013.6615583
Publikováno v:
2013 IEEE 63rd Electronic Components and Technology Conference.
Recently, the demand on the 3-D integration using through-silicon vias (TSVs) and micro-bumps has been increasing for better electrical performance and smaller form factor. However, lots of doubtful concerns on the reliability of 3-D stacked chips st
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::913e36628c3c35930f8db4002a86577c
https://doi.org/10.1109/ectc.2013.6575546
https://doi.org/10.1109/ectc.2013.6575546
Publikováno v:
2009 59th Electronic Components and Technology Conference.
Epoxy/ceramic composites are one of promising materials as embedded capacitors for a SiP technology, because they have a good processability and a compatibility with printed circuit boards (PCBs), in addition to a high dielectric constant. In this st
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::65cbd03ac32a926ac49fb7cc50a43065
https://doi.org/10.1109/ectc.2009.5074099
https://doi.org/10.1109/ectc.2009.5074099
Autor:
Il Whan Cho, Kwang Yoo Byun, Woong Sun Lee, Qwan Ho Chung, Ki Young Kim, Sung-Chul Kim, Myoung Geun Park
Publikováno v:
2008 58th Electronic Components and Technology Conference.
In this study, flip-chip packaging method was using gold stud bump on chip side and SnAgCu, lead free solder pad on organic substrate. Also capillary underfill enhanced the mechanical properties of gold-solder bump joint. This method was set up to th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5c0b9b3a3e9371651909ac5dfb78ea8b
https://doi.org/10.1109/ectc.2008.4550221
https://doi.org/10.1109/ectc.2008.4550221
Autor:
Kwang Yoo Byun, Woong Sun Lee
Publikováno v:
2007 International Conference on Electronic Materials and Packaging.
Thermal resistance model is very simple and good tool for thermal analysis of package system. In this study, thermal resistance model was compared with simulation tool and real measurement values of flip-chip package which was made by using DTSA (Dio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2205a1bf594b883bf7301b8d8c0f2889
https://doi.org/10.1109/emap.2007.4510327
https://doi.org/10.1109/emap.2007.4510327
Publikováno v:
2009 59th Electronic Components & Technology Conference; 2009, p771-776, 6p