Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Woon-Taek Oh"'
Autor:
Jin-Ho Kim, Jae-Youl Lee, Tea-Jin Kim, Kyung-Suc Nah, Woon-Taek Oh, Young-Hwan Chang, Gyoo-Cheol Hwang
Publikováno v:
SID Symposium Digest of Technical Papers. 44:396-399
This paper proposes a 3.4Gbps/lane intra-panel interface with 11.1% of the protocol overhead for the raw data to be transmitted. The proposed intra-panel interface uses a point-to-point interface architecture with embedded clock. To reduce the EMI ra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b1f52b56b74c4dd8d939971f36261087
https://doi.org/10.1002/j.2168-0159.2013.tb06230.x
https://doi.org/10.1002/j.2168-0159.2013.tb06230.x
Publikováno v:
SID Symposium Digest of Technical Papers. 44:384-387
A CMOS voltage-controlled oscillator (VCO) with robustness under PVT variation is proposed, and its application to a PLL-based CDR is also presented. In the VCO design, voltage regulator is used to suppress voltage variation and improved voltage-to-c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2fbc785970ec2769bcf465568a28021f
https://doi.org/10.1002/j.2168-0159.2013.tb06227.x
https://doi.org/10.1002/j.2168-0159.2013.tb06227.x
Autor:
Woon-Taek Oh, Yonghwan Chang, Jae-Youl Lee, Jin-Ho Kim, Tae-Jin Kim, Myunghee Lee, Jae-Yong Ihm
Publikováno v:
SID Symposium Digest of Technical Papers. 43:1227-1230
A Receiver incorporating bang-bang (binary) CDR for high speed intra panel interface is proposed. The proposed Receiver adopting Phase Locked Loop (PLL) based CDR provides high speed data rate by a bang-bang Phase Detector and Current Mode Logic (CML
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fb8e4b1c32d9887f3cbe83414a6f855e
https://doi.org/10.1002/j.2168-0159.2012.tb06019.x
https://doi.org/10.1002/j.2168-0159.2012.tb06019.x
Autor:
Jae-Youl Lee, Sunik Lee, Dong-Uk Park, Jae-Yong Ihm, Jin-Ho Kim, Young-hun Lee, Tae-Jin Kim, Young-Hwan Chang, Myunghee Lee, Young-Min Choi, Naxin Kim, Woon-Taek Oh
Publikováno v:
SID Symposium Digest of Technical Papers. 43:572-575
This paper presents LCD-TV system with newly proposed 2.8Gbps/lane intra-panel interface for 3D TV applications. The proposed intra-panel interface transfers data in a point-to-point manner with embedded clock. Scrambling scheme was applied to stabil
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::868a63f7009ccfa47aae4f72815770dc
https://doi.org/10.1002/j.2168-0159.2012.tb05845.x
https://doi.org/10.1002/j.2168-0159.2012.tb05845.x
Autor:
Woon-Taek Oh, Seo-Yoon Kim, Woo-Jae Choi, Wook-Hee Park, Ji-Ho Lew, Ik-Seok Yang, Mi-Youn Kim, Jong-Kee Kim, Jung-Tae Lee, Yoo-Chang Sung, Ha-Sook Kim
Publikováno v:
SID Symposium Digest of Technical Papers. 37:1658
We propose a COG(Chip-On-Glass) source driver which uses a current-mode interface named LCDS(Low Current Differential Signaling) with point-to-point topology, internal voltage regulator and internal gamma reference buffer for cost effective TFT-LCDs.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1dd1135ab9a7549ead6cf56fabef3fec
https://doi.org/10.1889/1.2433322
https://doi.org/10.1889/1.2433322