Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Woon Leng Loh"'
Publikováno v:
2022 IEEE 24th Electronics Packaging Technology Conference (EPTC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::11d299f219df8370ae254a91394922cc
https://doi.org/10.1109/eptc56328.2022.10013222
https://doi.org/10.1109/eptc56328.2022.10013222
Autor:
Ser Choong Chong, Ismael Cereno Daniel, Sharon Lim Pei Siang, Joseph Shim Cheng Yi, Alvin Lai Wai Song, Woon Leng Loh
Publikováno v:
2022 IEEE 72nd Electronic Components and Technology Conference (ECTC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b11601cc52c4f7db4262a0866a97e800
https://doi.org/10.1109/ectc51906.2022.00311
https://doi.org/10.1109/ectc51906.2022.00311
Autor:
Masaya Kawano, Xiang-Yu Wang, Qin Ren, Woon-Leng Loh, B. S. S. Chandra Rao, King-Jien Chui, Tsuyoshi Kawagoe, Ichiro Homma
Publikováno v:
2022 IEEE 72nd Electronic Components and Technology Conference (ECTC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a13ac4875981f64e71fe46aec6161c43
https://doi.org/10.1109/ectc51906.2022.00033
https://doi.org/10.1109/ectc51906.2022.00033
Publikováno v:
2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b25e5be0b90972ec26e93ae20c636ca
https://doi.org/10.1109/eptc53413.2021.9663908
https://doi.org/10.1109/eptc53413.2021.9663908
Publikováno v:
2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::abeb76587fd9cd9edf499bba477d9101
https://doi.org/10.1109/eptc53413.2021.9663901
https://doi.org/10.1109/eptc53413.2021.9663901
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
The 3D stacked DRAM is an essential key module for high-performance computing systems. However, the cost increase due to 3D stacking limits its applications. The current 3D stacking technology requires front-side and backside microbumps, temporary bo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3a1ef0a0ef7273664874a83286d3f082
https://doi.org/10.1109/ectc32696.2021.00117
https://doi.org/10.1109/ectc32696.2021.00117
Autor:
King-Jien Chui, Woon Leng Loh
Publikováno v:
2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC).
This paper investigate the evolution of wafer warpage at different stages of a Through Si interposer (TSI) process flow, with reference to 2 different types of temporary bonding material. Comparison was done between solvent based and mechanical based
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6a4cf33df1ad5aea71d19cfa2a179d2a
https://doi.org/10.1109/eptc50525.2020.9315102
https://doi.org/10.1109/eptc50525.2020.9315102
Publikováno v:
2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC).
Temporary bonding and de-bonding (TBDB) is one key technology in enabling the 2.5D/3D integration of semiconductor devices [1]. In this paper, we first evaluate two TBDB methods using different TBDB mechanism and corresponding adhesive materials, in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d6661d2985187de7d4a489aaaa73f4b
https://doi.org/10.1109/eptc50525.2020.9315033
https://doi.org/10.1109/eptc50525.2020.9315033
Autor:
Yao Zhu, Qin Ren, I-Ting Wang, Lin Ji, Woon Leng Loh, Zhixian Chen, King-Jien Chui, Xiangyu Wang, Fa Xing Che
Publikováno v:
2020 IEEE 70th Electronic Components and Technology Conference (ECTC).
This paper describes the concept and demonstration of a 2-tier MIMIM capacitor that can be placed around a TSV. By fabricating the metal-insulator-metal-insulator-metal (MIMIM) capacitor around the TSV, more than 30× increase in capacitance over a p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::56e08ceae9e619419725e88f21f2a5d2
https://doi.org/10.1109/ectc32862.2020.00101
https://doi.org/10.1109/ectc32862.2020.00101
Autor:
Qin Ren, Woon Leng Loh
Publikováno v:
2018 IEEE 20th Electronics Packaging Technology Conference (EPTC).
In this paper, Through Silicon Via (TSV) of Silicon on isolator (SOI) platform on via last wafer integration challenges were evaluated. TSV profile at Buried Oxide (BOX) and bulk Silicon of SOI substrates undercut improvement was assessed. Electropla
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f05a5c43efa0514fc0977b09caf7c50f
https://doi.org/10.1109/eptc.2018.8654389
https://doi.org/10.1109/eptc.2018.8654389