Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Woohyun Paik"'
Autor:
Taeseung Lee, Sunghoon Chang, Yongsoo Song, Junyeol Kim, Jinho Choi, Inrae Cho, Sanghyub Lee, Jikon Ryu, Woohyun Paik
Publikováno v:
Gut & Liver; 2024 Supplement, Vol. 18, p131-131, 1/4p
Autor:
Taeseung Lee, Sunghoon Chang, Yongsoo Song, Junyeol Kim, Jinho Choi, Inrae Cho, Sanghyub Lee, Jikon Ryu, Woohyun Paik
Publikováno v:
Gut & Liver; 2024 Supplement, Vol. 18, p131-131, 1/4p
Autor:
Taeseung Lee, Hongmin Shin, Sunghoon Chang, Yongsoo Song, Junyeol Kim, Jinho Choi, Inrae Cho, Woohyun Paik, Jikon Ryu, Sang Hyub Lee
Publikováno v:
Gut & Liver; 2024 Supplement, Vol. 18, p131-131, 1/4p
Publikováno v:
ISOCC
Power grid design is one of the key challenges in large SoC design. In order to guarantee robustness of the power grid, dynamic IR drop should be analyzed correctly. In this paper, we have described weakness of vectorless analysis and necessity of ve
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::548024d345f34c4a673d1599c30c44b5
https://doi.org/10.1109/isocc50952.2020.9332987
https://doi.org/10.1109/isocc50952.2020.9332987
Autor:
Kieyong Park, Minji Lee, Yongseok Kang, Sungjun Lim, Changseok Choi, Woohyun Paik, Hosoon Shin
Publikováno v:
2019 International SoC Design Conference (ISOCC).
In this paper, we have improved dynamic IRdrop performance in large SoC design through various dynamic IRdrop reduction technique. Robust power/ground rail structure is proposed and applied to standard cell power/ground pin connection. Manual adding
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0c920e0426773f5cfd1a9a9005ec6825
https://doi.org/10.1109/isocc47750.2019.9078510
https://doi.org/10.1109/isocc47750.2019.9078510
Autor:
Woohyun Paik, SeungNam Son, WonChul Do, Kwangsup So, HoDol Yoo, Yun Ra, DooWon Lee, KangWook Lee, Ji Hyun Kim, JooHyun Kim
Publikováno v:
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM).
A new Wafer Level System-in-Package (WLSiP) has been designed and developed where Application Processor (AP), Low Power Double Data Rate 4 (LPDDR4) memory, and Power Management Integrated Circuit (PMIC) semiconductor technologies as well as passive c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e899f3cfc087582a97228b96fda2703b
https://doi.org/10.1109/edtm.2018.8421528
https://doi.org/10.1109/edtm.2018.8421528
Autor:
Yun Ra, Hong-Teuk Kim, Seungmin Woo, Jong-Moon Kim, Woohyun Paik, Yo-Chuol Ho, Kwangsup So, Seung-Yoon Jung, Jin-Kyoung Du, Seung Yeon Kim
Publikováno v:
2017 11th European Conference on Antennas and Propagation (EUCAP).
For applications of 5G (5th generation mobile networks) communication systems, dual-polarized patch array antenna operating at 28.5 GHz is designed on the package substrate. To verify the radiation performance of designed antenna itself, a test packa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::afcaedaefa68fa0d0bcb1b7a1af3150b
https://doi.org/10.23919/eucap.2017.7928848
https://doi.org/10.23919/eucap.2017.7928848
Autor:
Youngwoo Kim, Yun Ra, Kibum Kang, Taisik Yang, Heegon Kim, Joungho Kim, Woohyun Paik, Jonghyun Cho
Publikováno v:
2016 IEEE International Symposium on Electromagnetic Compatibility (EMC).
These days, mobile devices require low-power consumption. To meet these requirements, IC's operating voltage is continuously lowered. As a result, power noise margin decreases which require more precise Power Distribution Network (PDN) design. In thi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::09235e2c7bf8126f54a87b87240fe431
https://doi.org/10.1109/isemc.2016.7571668
https://doi.org/10.1109/isemc.2016.7571668
Autor:
Taisik Yang, Kibum Kang, Youngwoo Kim, Woohyun Paik, Jonghyun Cho, Yun Ra, Kiyeong Kim, Joungho Kim
Publikováno v:
2015 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS).
In this paper, frequency dependent target impedance is proposed for optimal Power Distribution Network (PDN) design. Target impedance indicates how much and where decoupling capacitors should be located in the PDNs therefore it directly affects perfo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ee7387174f3d5032baf105c106cd1cb7
https://doi.org/10.1109/edaps.2015.7383675
https://doi.org/10.1109/edaps.2015.7383675
Publikováno v:
2015 International SoC Design Conference (ISOCC).
In this paper we have proposed a way of a model-based CMP proximity correction in sub-28nm SoC (system-on-a-chip) designs. Just like OPC (optical proximity correction) process against lithography variations, the proposed approach can be added at the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::22daa49c8090fbdb05f26a7f6fc02f4b
https://doi.org/10.1109/isocc.2015.7401685
https://doi.org/10.1109/isocc.2015.7401685