Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Won-Joon Ho"'
Publikováno v:
Journal of Electrostatics. 90:54-60
Flat panel displays are often exposed to the electrostatic damage during various panel manufacturing processes. In this paper, we report the electrostatic discharge failure in a unique process condition of OLED display process during which the substr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6ba50799951b5228ca8faba4a85b0f54
https://doi.org/10.1016/j.elstat.2017.09.001
https://doi.org/10.1016/j.elstat.2017.09.001
Publikováno v:
Journal of Electrostatics. 72:228-234
LCD manufacturing processes are often exposed to the electrostatic hazards due to going through various optic film processes. In this paper, we report the electrostatic discharge failure that occurred during the detachment process of protective film
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a6477a7c3d29e31d649c199237259e65
https://doi.org/10.1016/j.elstat.2014.03.003
https://doi.org/10.1016/j.elstat.2014.03.003
Autor:
Hi Deok Lee, Yu−Be Park, Dong−Sun Kim, Dae Byung Kim, Won−Joon Ho, Jae−Yeong Kim, In Shik Han, Sung Hyung Park
Publikováno v:
Japanese Journal of Applied Physics. 45:2455-2458
A novel back end-of-line (BEOL) process scheme is proposed to improve negative bias temperature instability (NBTI) characteristics through the characterization of the impact of each BEOL process on NBTI of p+ gate metal oxide semiconductor field-effe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::871ed3b5ac4141d8fb2aabf3c4ca003a
https://doi.org/10.1143/jjap.45.2455
https://doi.org/10.1143/jjap.45.2455
Autor:
Won-Joon Ho, Hi-Deok Lee
Publikováno v:
Journal of the Korean Institute of Electrical and Electronic Material Engineers. 18:1001-1006
A new fabrication method is proposed to form the stacked polysilicon gate by nitridation in atmosphere using conventional LP-CVD system. Two step stacked layers with an amorphous layer on top of a polycrystalline layer as well as three step stacked l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::475c3428e65e38721bc1d08ff1f73592
https://doi.org/10.4313/jkem.2005.18.11.1001
https://doi.org/10.4313/jkem.2005.18.11.1001
Autor:
Won-Joon Ho, Kwang S. Suh, Jong-Pil Shim, Du-Seok Oh, Chun-Bae Lim, Seung-Won Jung, Taeyoung Kim, Dong-Sun Kim, Ju-Young Jung, Hyung-Tae Kim
Publikováno v:
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits.
Optical microscope and FIB were widely used to find out defect locations in display panels. But failure analysis of LTPS TFTs is getting more difficult to detect the locations than that of (a-Si:H) TFTs. We adopted FIB and EMMI tool and found the lea
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5bd0cf19226c2f369722ed33fb2be6ce
https://doi.org/10.1109/ipfa.2012.6306314
https://doi.org/10.1109/ipfa.2012.6306314
Autor:
Ju-Young Jeong, Won-Joon Ho, Dongsun Kim, Jaemin Lee, Hyung-Tae Kim, Seunghoon Han, Hee-Jung Yang, Gyu-Won Han, Du-Seok Oh
Publikováno v:
2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits.
We have investigated pad open failure of data line. To verify the mechanism of DPO failure, we designed the new method included in CCD camera and driving circuit and successfully achieved the failure images. The DPO procedure was divided into three s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::834b7e062401f4d944f1255db185bec3
https://doi.org/10.1109/ipfa.2012.6306312
https://doi.org/10.1109/ipfa.2012.6306312
Autor:
Sung-Hyung Park, Young-Seok Kang, Won-Joon Ho, In-Shik Han, Dae-Byung Kim, Kyung-Min Kim, Jin-Suk Wang, Heui-Seung Lee, Chang Young Lee, Jinwon Park, Yong-Goo Kim, Ihl-Hyun Cho, Jeong-Gun Lee, Sung-Bo Hwang, Hee-Hwan Ji, Hi-Deok Lee, Sang-Young Kim
Publikováno v:
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..
For the first time, on-chip charge pumping method is proposed to characterize ultra thin gate oxide for nano-scale CMOSFETs. Designed on-chip charge pumping system can supply 30-500MHz square-type pulse waves to DUT transistor and measured charge pum
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a1503524d0bd0c63f51ac6a3e27568cc
https://doi.org/10.1109/iedm.2005.1609449
https://doi.org/10.1109/iedm.2005.1609449
Autor:
Han-Soo Joo, Jinwon Park, Hee-Hwan Ji, Hi-Deok Lee, Sang-Young Kim, Heui-Seung Lee, Sung-Hyung Park, Sung-Bo Hwang, Dae-Mann Kim, Won-Joon Ho, In-Sik Han, Ihl-Hyun Cho, Dae-Byung Kim, Jeong-Gon Lee
Publikováno v:
2006 IEEE International Conference on Microelectronic Test Structures.
Novel test structure is proposed for on-chip evaluation of the crosstalk-induced variation of coupling capacitance in multi-fanout and global interconnect lines. Then, it is experimentally shown that the crosstalk-induced variation of coupling capaci
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::20b40e41c5c3fdc74c933f4c68538070
https://doi.org/10.1109/icmts.2006.1614307
https://doi.org/10.1109/icmts.2006.1614307
Autor:
Hi-Deok Lee, Hee-Hwan Ji, In-Sik Han, Han-Soo Joo, Dae-Mann Kim, Sung-Hyung Park, Heui-Seung Lee, Won-Joon Ho, Dae-Byung Kim, Ihl-Hyun Cho, Sang-Young Kim, Sung-Bo Hwang, Jeong-Gon Lee, Jin-Won Park
Publikováno v:
2006 IEEE International Conference on Microelectronic Test Structures; 2006, p218-221, 4p
Publikováno v:
2006 13th International Symposium on the Physical & Failure Analysis of Integrated Circuits; 2006, p355-358, 4p