Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Wisam Kadry"'
Autor:
Jae Cheol Son, Jin Sung Park, Wookyeong Jeong, Arkadiy Morgenshtein, Wisam Kadry, Amir Nahir, Vitali Sokhin, Dimtry Krestyashyn, Sung-Boem Park
Publikováno v:
IEEE Design & Test. 34:65-76
Hardware-accelerated simulation platforms can significantly reduce the validation time. This article presents an off-platform test generation method and it compares and contrasts it against the on-platform alternative for two state-of-the-art multico
Autor:
Wisam Kadry, Dimtry Krestyashyn, Arkadiy Morgenshtein, Amir Nahir, Vitali Sokhin, Jin Sung Park, Sung-Boem Park, Wookyeong Jeong, Jae Cheol Son
Publikováno v:
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015.
Autor:
Charles Meissner, Wisam Kadry, Randall R. Pratt, Anatoly Koyfman, Thompto Brian W, Brett Adam St. Onge, Daniel Hershcovich, Mike Schiffli, Avi Ziv, Allon Adir, Elena Tsanko, Oz Hershkovitz, Karen Holtz, Hickerson Bryan G, John M. Ludden, Dave Goodman, Amir Nahir
Publikováno v:
DAC
Transactional memory is a promising mechanism for synchronizing concurrent programs that eliminates locks at the expense of hardware complexity. Transactional memory is a hard feature to verify. First, transactions comprise several instructions that
Publikováno v:
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014.
Publikováno v:
Hardware and Software: Verification and Testing ISBN: 9783319030760
Haifa Verification Conference
Haifa Verification Conference
Post-silicon functional validation poses unique challenges that must be overcome by bring-up tools. One such major challenge is the requirement to reduce overhead associated with the testing procedures, thereby ensuring that the expensive silicon pla
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::11f880208a30afc00f22fe6ecb0f4b1d
https://doi.org/10.1007/978-3-319-03077-7_12
https://doi.org/10.1007/978-3-319-03077-7_12
Publikováno v:
Hardware and Software: Verification and Testing ISBN: 9783319030760
Haifa Verification Conference
Haifa Verification Conference
As hardware systems continue to grow exponentially, existing functional verification methods are lagging behind, consuming a growing amount of manual effort and simulation time. In response to this inefficiency gap, we developed SLAM, a novel method
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::64e402f82462088684a0b984b65bc0d3
https://doi.org/10.1007/978-3-319-03077-7_11
https://doi.org/10.1007/978-3-319-03077-7_11
Publikováno v:
DAC
Verifying new hardware systems is a daunting task. To reduce the amount of effort involved, verification teams attempt to reuse as much verification IP as possible. We introduce a novel approach for test generation that enables the reuse of verificat