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pro vyhledávání: '"Wendy Arnott Elsasser"'
Publikováno v:
ISCA
Fence instructions are a coarse-grained mechanism to enforce the order of instruction execution in an out-of-order pipeline. They are an overkill for cases when only one instruction must wait for the completion of one other instruction. For example,
Publikováno v:
PACT
Optimizing a multilayer cache hierarchy involves a careful balance of data placement, replacement, promotion, bypassing, prefetching, etc. to capture the various properties of access streams. Often getting good performance involves aggressively orche
Autor:
Wendy Arnott Elsasser, Gururaj Saileshwar, Ramrakhyani Prakash S, José A. Joao, Moinuddin K. Qureshi, Prashant J. Nair
Publikováno v:
MICRO
Securing off-chip main memory is essential for protection from adversaries with physical access to systems. However, current secure-memory designs incur considerable performance overheads - a major cause being the multiple memory accesses required fo
Autor:
Radhika Jagtap, Matthias Jung, Wendy Arnott Elsasser, Christian Weis, Norbert Wehn, Andreas Hansson
Publikováno v:
MEMSYS
Proceedings of the International Symposium on Memory Systems-MEMSYS 17
Proceedings of the International Symposium on Memory Systems -MEMSYS '17
Proceedings of the International Symposium on Memory Systems
Proceedings of the International Symposium on Memory Systems-MEMSYS 17
Proceedings of the International Symposium on Memory Systems -MEMSYS '17
Proceedings of the International Symposium on Memory Systems
Across applications, DRAM is a significant contributor to the overall system power, with the DRAM access energy per bit up to three orders of magnitude higher compared to on-chip memory accesses. To improve the power efficiency, DRAM technology incor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::846a262a071bdde9cfebee9d90dfc443
http://arxiv.org/abs/1803.07613
http://arxiv.org/abs/1803.07613
Autor:
Moinuddin K. Qureshi, Gururaj Saileshwar, Wendy Arnott Elsasser, Ramrakhyani Prakash S, Prashant J. Nair
Publikováno v:
HPCA
Building trusted data-centers requires resilient memories which are protected from both adversarial attacks and errors. Unfortunately, the state-of-the-art memory security solutions incur considerable performance overheads due to accesses for securit