Zobrazeno 1 - 10
of 105
pro vyhledávání: '"Wei-Yip Loh"'
Autor:
Chris Hobbs, Sean L. Rommel, Wei-Yip Loh, Kausik Majumdar, Paul Thomas, R. Contreras-Guerrero, Abhinav Gaur, Enri Marini, Man Hoi Wong, Kunal Bhatnagar, Ravi Droopad, Matthew J. Filmer, Brian Romanczyk, D. Pawlik
Publikováno v:
IEEE Transactions on Electron Devices. 62:2450-2456
In0.53Ga0.47As Esaki tunnel diodes grown by molecular beam epitaxy on an Si substrate via a graded buffer and control In0.53Ga0.47As Esaki tunnel diodes grown on an InP substrate are compared in this paper. Statistics are used as a tool to show peak-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::206a17117100c233f3e03fa6a5c8a6bb
https://doi.org/10.1109/ted.2015.2445731
https://doi.org/10.1109/ted.2015.2445731
Autor:
Gennadi Bersuker, Dmitry Veksler, Wei-Yip Loh, Dae-Hyun Kim, Tae-Woo Kim, Ken Matthews, W.-E Wang, S. Deora, Rinus T. P. Lee, Paul Kirsch, Chris Hobbs, Hill Richard J
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 13:507-514
Instability of InGaAs channel nMOSFETs with the Al2O3/ ZrO2 gate stack under positive bias stress demonstrates recoverable and unrecoverable components, which can be tentatively assigned to the pre-existing and generated defects, respectively. The re
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::904a189c46f720608d0632327d4f65dd
https://doi.org/10.1109/tdmr.2013.2284376
https://doi.org/10.1109/tdmr.2013.2284376
Autor:
Patrick Guo-Qiang Lo, Wei-Yip Loh, Dim-Lee Kwong, Mingbin Yu, He Qian, Rong Yang, N. Balasubramanian, Jinling Shi, Yong-Zhong Xiong, Junfeng Li
Publikováno v:
Solid-State Electronics. 80:55-58
This paper fabricated SOI nMOSFETs with floating body and different body-contact structures, including H-gate (HG), body-tied-to-source (BTS), and low-barrier-body-contact (LBBC), on the same SOI substrate. Through direct comparison of DC, analog, RF
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::befd6c98ffe5e12d5ec92cb518147515
https://doi.org/10.1016/j.sse.2012.09.011
https://doi.org/10.1016/j.sse.2012.09.011
Publikováno v:
physica status solidi c. 9:2184-2188
The local structural characterization of novel contact materials (nickel silicides) on N2+ implanted Si(100) substrates have been performed using Extended X-ray-Absorption Fine-Structure Spectroscopy (EXAFS). The crystal phases of nickel silicides th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::490ec96e3fe646fff62fd761e81f5993
https://doi.org/10.1002/pssc.201200250
https://doi.org/10.1002/pssc.201200250
Autor:
Raj Jammy, Kanghoon Jeon, Prashant Majhi, Hsing-Huang Tseng, Wei-Yip Loh, Jungwoo Oh, Chenming Hu, Chang Yong Kang, Wade Xiong, Tsu Jae King Liu
Publikováno v:
Solid-State Electronics. :22-27
Planar band-to-band tunneling FETs (TFETs) have been fabricated on silicon-on-insulator (SOI) substrates using conventional CMOS technologies with a highly scaled sub-60 nm gate length (effective gate length [ L g ] ∼ 40 nm due to an overlap betwee
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::84bb29f657a5781cdecde8a7cf6eefa6
https://doi.org/10.1016/j.sse.2011.06.019
https://doi.org/10.1016/j.sse.2011.06.019
Autor:
Domingo Ferrer, B.-G. Min, P. Y. Hung, Gennadi Bersuker, Se-Hoon Lee, Prashant Majhi, J. Oh, Wei-Yip Loh, Jiacheng Huang, R. Harris, Hsing-Huang Tseng, Sanjay K. Banerjee, Paul Kirsch, B. Sassman, R. Jammy
Publikováno v:
IEEE Transactions on Electron Devices. 58:2917-2923
Preserving the integrity (e.g., Ge concentration, strain, and lattice perfection) of pseudomorphically grown silicon germanium (SiGe) heterostructure channels on Si substrates is one of the most critical factors in obtaining optimal pMOSFET performan
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::320ab105c172058dedcb7a515561687b
https://doi.org/10.1109/ted.2011.2159862
https://doi.org/10.1109/ted.2011.2159862
Autor:
Raj Jammy, Jungwoo Oh, Prashant Majhi, Richard Hill, Jeff Huang, Wei-Yip Loh, Paul Kirsch, Niti Goel, Joel Barnett, Chanro Park, J. Price
Publikováno v:
ECS Transactions. 35:335-344
The superior transport properties of III-V materials makes them attractive choices to enable improved performance at low power. This paper examines the module targets and challenges for III-V materials to be successfully integrated for high performan
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bb81bf88bddecf84cc87b6f8e2416b6e
https://doi.org/10.1149/1.3569926
https://doi.org/10.1149/1.3569926
Autor:
Brian Coss, Wei-Yip Loh
Publikováno v:
MRS Bulletin. 36:97-100
Effective schemes to address contact resistance between silicide and a highly doped diffused junction are examined. Some of the techniques introduced include (1) metal work function tuning, (2) interfacial dipole engineering, and (3) phase modulation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3574e437e6563b93a4f839324b15d696
https://doi.org/10.1557/mrs.2011.7
https://doi.org/10.1557/mrs.2011.7
Autor:
Shi-Guang Li, Wei-Yip Loh, Hi-Deok Lee, Soon-Yen Jung, Hyuk-Min Kwon, Hong-Sik Shin, Ying-Ying Zhang, Jungwoo Oh, R. Jammy, Won-Ho Choi, Kee-Young Park, In-Shik Han, Zhun Zhong, Prashant Majhi
Publikováno v:
IEEE Transactions on Electron Devices. 56:348-353
Highly thermally stable Ni germanide technology for high performance germanium metal-oxide-semiconductor field-effect transistors (Ge MOSFETs) is proposed, utilizing Pd incorporation into Ni germanide. The proposed Ni germanide shows not only the imp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c9fbcdd50221693fbb099fc6f92739ff
https://doi.org/10.1109/ted.2008.2010593
https://doi.org/10.1109/ted.2008.2010593
Autor:
Paul Kirsch, Byung Jin Cho, Chadwin D. Young, Kyu-Jin Choi, Hi-Deok Lee, Wei-Yip Loh, Se-Hoon Lee, R. Jammy, Jungwoo Oh, Suman Datta, Prashant Majhi, B. Sassman, H.R. Harris, Hsing-Huang Tseng, A. Bowonder, Sanjay K. Banerjee, W. Tsai
Publikováno v:
IEEE Electron Device Letters. 29:1017-1020
High-performance sub-60 nm Si/SiGe (Ge:~75%)/Si heterostructure quantum well pMOSFETs with a conventional MOSFET process flow, including gate-first high-kappa/metal gate stacks with ~1 nm equivalent oxide thickness, are demonstrated. For the first ti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1fe799304dc12703c14ffcf6f03a4971
https://doi.org/10.1109/led.2008.2002073
https://doi.org/10.1109/led.2008.2002073