Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Wei-Shun Chuang"'
Autor:
Wei-Shun Chuang, 莊惟舜
95
This thesis presents a diagnosis technique to locate multiple timing faults in scan chains. Jump simulation is a novel parallel simulation technique which quickly searches for the upper and the lower bounds of every individual fault, in spite
This thesis presents a diagnosis technique to locate multiple timing faults in scan chains. Jump simulation is a novel parallel simulation technique which quickly searches for the upper and the lower bounds of every individual fault, in spite
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/53916743310587044525
Autor:
Wei-Shun Chuang, 莊偉舜
95
The information technology has developed rapidly in recent years and the use of wireless network have come to a mature technique. Especially, 802.11b have become a leading style in market., a lot of larger manufacturers have launched into re
The information technology has developed rapidly in recent years and the use of wireless network have come to a mature technique. Especially, 802.11b have become a leading style in market., a lot of larger manufacturers have launched into re
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/23642307449269598908
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18:392-400
This paper presents a design for testability and minimum leakage pattern generation technique to reduce static power during test and burn-in for nanometer technologies. This technique transforms the minimum leakage pattern generation problem into a p
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 27:1104-1116
A diagnosis technique is presented to locate multiple timing faults in scan chains. Jump simulation is a novel parallel simulation technique which quickly searches for the upper and the lower bounds of every individual fault. The proposed technique t
Publikováno v:
ITC
A diagnosis technique is presented to locate seven types of single faults in scan chains, including stuck-at faults and timing faults. This technique implements the Jump Simulation, a novel parallel simulation technique, to quickly search for the upp
Publikováno v:
2006 IEEE International Test Conference; 2006, p1-9, 9p
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Mar2010, Vol. 18 Issue 3, p392-400, 9p, 6 Diagrams, 9 Charts, 1 Graph