Zobrazeno 1 - 10
of 58
pro vyhledávání: '"Wei-Cheng Lien"'
Autor:
Wei-Cheng Lien, 連偉誠
93
This thesis contents a sigma-delta fractional-N synthesizer mainly. Besides, it contents two integer-N synthesizers and two voltage-controlled oscillators. These circuits are implemented for WLAN and Bluetooth applications. First, we describe
This thesis contents a sigma-delta fractional-N synthesizer mainly. Besides, it contents two integer-N synthesizers and two voltage-controlled oscillators. These circuits are implemented for WLAN and Bluetooth applications. First, we describe
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/51308074398041283424
Publikováno v:
2022 IEEE 7th International Conference on Intelligent Transportation Engineering (ICITE).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a6706eeb344d5e5c75b3cc2a48d1173d
https://doi.org/10.1109/icite56321.2022.10101435
https://doi.org/10.1109/icite56321.2022.10101435
Publikováno v:
ICCE-TW
Most underwater image restoration works indicate that restoring images can improve their visual quality and performance of computer vision tasks that use the restored data. This paper aims to investigate how image restoration contributes to underwate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b6558340fc70386e385c008e3602e18
https://doi.org/10.1109/icce-tw52618.2021.9602998
https://doi.org/10.1109/icce-tw52618.2021.9602998
Autor:
Jim C. Cheng, Wei-Cheng Lien, Ayden Maralani, Shi Qian Shao, Kristen L. Dorsey, Albert P. Pisano
Publikováno v:
Materials Science Forum. :636-639
In this work, we demonstrate the stable operation of 4H-silicon carbide (SiC) p-n diodes at temperature up to 600 °C. In-depth study methods of simulation, fabrication and characterization of the 4H-SiC p-n diode are developed. The simulation result
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::47dc684ba705ab5c0ca0b59dc9a02082
https://doi.org/10.4028/www.scientific.net/msf.821-823.636
https://doi.org/10.4028/www.scientific.net/msf.821-823.636
Publikováno v:
Journal of Electronic Testing. 30:673-685
LFSR reseeding techniques are widely adopted in logic BIST to enhance fault detectability and shorten test-application time for integrated circuits. In order to achieve complete fault coverage, previous reseeding methods often need a prohibitive amou
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::899ae22cd1634bf744b5b70efc3c85e4
https://doi.org/10.1007/s10836-014-5482-4
https://doi.org/10.1007/s10836-014-5482-4
Publikováno v:
Materials Science Forum. :1126-1129
Low power Silicon Carbide (SiC) devices and Integrated Circuits (ICs) in conjunction with SiC or Aluminum Nitride (AlN) sensing elements will enable sensing functions in high temperature environments up to 600 °C where no silicon based devices or ci
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ae45fc423d10f3d2455bb40493c21fcf
https://doi.org/10.4028/www.scientific.net/msf.778-780.1126
https://doi.org/10.4028/www.scientific.net/msf.778-780.1126
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 33:127-138
During an at-speed scan-based test, excessive capture power may cause significant current demand, resulting in the IR-drop problem and unnecessary yield loss. Many methods address this problem by reducing the switching activities of power-risky patte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2f8e9dc01712632f6cbdd1858b98b169
https://doi.org/10.1109/tcad.2013.2282281
https://doi.org/10.1109/tcad.2013.2282281
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 32:152-164
Output selection is a recently proposed test response compaction method, where only a subset of output response bits is selected for observation. It can achieve zero aliasing, full X-tolerance, and high diagnosability. One critical issue for output s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ae0aab2154f06fc2bbeb1c97c9851279
https://doi.org/10.1109/tcad.2012.2214479
https://doi.org/10.1109/tcad.2012.2214479
Publikováno v:
2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).
Test-per-clock BIST scheme has the advantages of very short test application time and small test data volume. However, conventionally this scheme needs an extra parallel response monitor for response analysis that may lead to large area overhead. Thi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::28f4de6c1dd5eda06485d02ffa9a6098
https://doi.org/10.1109/vlsi-dat.2016.7482556
https://doi.org/10.1109/vlsi-dat.2016.7482556
Publikováno v:
ACS Nano. 5:7748-7753
This study describes a strategy for developing ultra-high-responsivity broadband Si-based photodetectors (PDs) using ZnO nanorod arrays (NRAs). The ZnO NRAs grown by a low-temperature hydrothermal method with large growth area and high growth rate ab
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cc738a8b37dbda5db0f6267357fad07a
https://doi.org/10.1021/nn203357e
https://doi.org/10.1021/nn203357e