Zobrazeno 1 - 10
of 22
pro vyhledávání: '"W.R. Cyre"'
Autor:
W.R. Cyre
Publikováno v:
IEEE Transactions on Knowledge and Data Engineering. 9:8-23
Initial requirements for new digital systems and products that are generally expressed in a variety of notations including diagrams and natural language can be automatically translated to a common knowledge representation for integration, for consist
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::37b16ea687fb7eff19e141427ae0ae6d
https://doi.org/10.1109/69.567041
https://doi.org/10.1109/69.567041
Autor:
W.R. Cyre
Publikováno v:
IEEE Transactions on Computers. 43:186-200
Addresses the problem of comparing and unifying temporal relationships between activities expressed in timing diagrams and natural language narrative (English). This problem often occurs in specifications expressing behavioral requirements and constr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::de805bb8fdc38afcff34bf3a83f035c8
https://doi.org/10.1109/12.262123
https://doi.org/10.1109/12.262123
Publikováno v:
IEEE International Workshop on Rapid System Prototyping
ModelMaker is a tool being developed to help modelers rapidly develop behavioral models from natural language descriptions to support the construction of virtual prototypes. This tool analyzes documents for behavioral patterns and constructs a compon
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8386cbdc1bca467698642e8fa895327f
https://doi.org/10.1109/iwrsp.1999.779050
https://doi.org/10.1109/iwrsp.1999.779050
Autor:
W.R. Cyre
Publikováno v:
ICCD
System-level design requires behavioral models of its complex components in order to validate the designs, synthesize implementations and generate tests. Descriptions of these components are often only available as English descriptions. Developing be
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5bfa791652f09ddd9723fa45523b4c37
https://doi.org/10.1109/iccd.1999.808552
https://doi.org/10.1109/iccd.1999.808552
Publikováno v:
ICCD
Partitioning is a very important task in hardware/software co-design. Generally the size of the edge cut-set is used to evaluate the communication cost. When communication between components is through buffered channels, the size of the edge cut-set
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cb93fbb069a4cfed26c81cce242e73d0
https://doi.org/10.1109/iccd.1998.727118
https://doi.org/10.1109/iccd.1998.727118
Autor:
W.R. Cyre, A. Gunawan
Publikováno v:
Proceedings International Verilog HDL Conference and VHDL International Users Forum.
Describes a tool to facilitate rapid modeling of devices from informal documents. ModelMaker analyzes and indexes the source document for the noun phrases and identifiers it contains. When the engineer needs information on pins, components or other i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::df0b3fdff067e58eb1df4059e6828448
https://doi.org/10.1109/ivc.1998.660692
https://doi.org/10.1109/ivc.1998.660692
Publikováno v:
International Workshop on Rapid System Prototyping
One of the major differences in partitioning for co-design is in the way the communication cost is evaluated. Generally, the size of the edge cut-set is used. When communication between components is through buffered channels, the size of the edge cu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f4e6125c48485edc01b11e3a949add85
https://doi.org/10.1109/iwrsp.1998.676679
https://doi.org/10.1109/iwrsp.1998.676679
Autor:
W.R. Cyre, Ta-Cheng Lin
Publikováno v:
Proceedings IEEE SOUTHEASTCON '97. 'Engineering the New Century'.
The trends of high-level synthesis are moving from using elementary operations to more complicated operations. These complex operations are implemented by using complicated functional units. Most complex components only have single data I/O ports (bu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::50acc3492f557dcdbb01bd8c7637cf51
https://doi.org/10.1109/secon.1997.598606
https://doi.org/10.1109/secon.1997.598606
Publikováno v:
SIMULATION. 29:165-172
This paper discusses the multiple-instruction stream/ multiple-data stream (MIMD) Wisconsin parallel array computer (WISPAC). The design of the computer makes use of current, low-cost microprocessor technology and is intended to meet future needs in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9e3936151ad498d6609c9629c9410d6d
https://doi.org/10.1177/003754977702900525
https://doi.org/10.1177/003754977702900525
Autor:
W.R. Cyre, G.J. Lipovski
Publikováno v:
IEEE Transactions on Computers. :83-87
One possible hardware implementation for the fast Fourier transform (FFT) of 2m samples is to have 2m-1 cells, each of which performs two of the necessary computations during each of the m passes through the processor. But in each of these m passes,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3ee44c93cc4c6c0f63092e50aaee9956
https://doi.org/10.1109/t-c.1972.223434
https://doi.org/10.1109/t-c.1972.223434