Zobrazeno 1 - 10
of 19
pro vyhledávání: '"W.J. Helms"'
Publikováno v:
IEEE Transactions on Instrumentation and Measurement. 53:1485-1492
The original digital calibration approach for 1 b/stage and 1.5 b/stage pipeline analog-digital converters produces missing or nonmonotonic digital codes with the device and circuit impairments typical of modern deep submicrometer CMOS technologies.
Publikováno v:
IEEE Journal of Solid-State Circuits. 29:63-66
This paper presents a CMOS buffer amplifier which operates on a single 5-V power supply. The uniquely symmetrical design adds the following advantages: rail-to-rail linear, symmetrical operation at both the input and output; the output stage allows t
Publikováno v:
ISCAS (1)
A popular method of digital calibration for pipelined analog-to-digital converters was introduced by Karanicolas et al. (IEEE J. Solid-State Circuits, vol.28, pp.1207-1215, 1993). Although it is tolerant of comparator offset voltages, the algorithm o
Publikováno v:
Great Lakes Symposium on VLSI
This paper proposes a PArallel Two patH (PATH) technique for oversampled bandpass analog-to-digital converter in low-power and low-voltage environment to relax the settling requirement and to increase signal-to-noise ratio. The design considerations
Publikováno v:
1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453).
The ability to place vast transistor count on a single chip offers designers to experiment with a new architecture. A new architecture alternatives, known as Mulitrace Cluster, is proposed to overcome the limits of circuit technology and microarchite
Autor:
W.J. Helms
Publikováno v:
Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.
The use of silicon compilers for the generation of systems which contain analog subsystems is relatively novel; and the expected performance levels are not well known. A description is given of the actual performance obtained from switched-capacitor
Publikováno v:
Proceedings of the 33rd Midwest Symposium on Circuits and Systems.
Digital compatible CMOS buffer amplifiers which achieve a high degree of linearity along with heavy load (300 Omega mod mod 100 pf) driving capability from a single-5-V supply are presented. It is shown that with a novel design of the class AB output
Autor:
W.J. Helms
Publikováno v:
IEEE Electron Device Letters. 6:54-56
The custom integrated circuit design technique pioneered by Mead and Conway [1] is often used for moderately complex digital systems. The fabrication is carried out at a "foundry" where a "standard" NMOS process is applied to the design. In this note
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.