Zobrazeno 1 - 10
of 59
pro vyhledávání: '"W. Wakamiya"'
Autor:
Mikio Asakura, Masanori Hayashikoshi, Kazuyasu Fujishima, K. Tanaka, Kazutami Arimoto, Masaki Tsukude, Hideto Hidaka, Katsuhiro Suma, Y. Ohno, Tsukasa Oishi, Yasuhiro Konishi, Kazutoshi Hirayama, W. Wakamiya, Shinji Kawai
Publikováno v:
IEEE Journal of Solid-State Circuits. 27:1020-1027
A high-speed 16-Mb DRAM with high reliability is reported. A multidivided column address decoding scheme and a fully embedded sense-amplifier driving scheme were used to meet the requirements for high speed. A low-power hybrid internal power supply v
Publikováno v:
Microelectronic Engineering. 15:639-642
In this paper, described is a new simple isolation method utilized for realizing sub-half micron devices. Substantially, this isolation method is a dielectric isolation, of which field oxide is the CVD-oxide instead of the thermal oxide with self-ali
Autor:
T. Nakano, Yoshio Matsuda, Kazutami Arimoto, Michihiro Yamada, Tsukasa Oishi, W. Wakamiya, T. Yoshihara, Kazuyasu Fujishima, Masaki Tsukude, Shin'ichi Satoh
Publikováno v:
IEEE International Solid-State Circuits Conference.
The authors describe a single 3.3-V, 16-Mb DRAM (dynamic RAM) fabricated in a 0.5- mu m, twin-well CMOS technology and packaged in a 400-mil small-outline J-leaded package. The design features are an array architecture based on the twisted-bit-line (
Autor:
K. Itoga, K. Sentoku, Takahiro Matsumoto, H. Ootera, Kenji Marumoto, Takashi Hifumi, T. Yamamoto, W. Wakamiya, Muneyoshi Suita, H. Sumitani, S. Ohishi, R. Edo
Publikováno v:
Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135).
Publikováno v:
Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135).
Publikováno v:
Digest of Papers. Microprocesses and Nanotechnology'98. 198 International Microprocesses and Nanotechnology Conference (Cat. No.98EX135).
Publikováno v:
27th Joint Propulsion Conference.
Autor:
Kazutami Arimoto, Kazuyasu Fujishima, Tsukasa Oishi, Yoshio Matsuda, T. Nakano, Shin'ichi Satoh, Masaki Tsukude, Michihiro Yamada, W. Wakamiya
Publikováno v:
IEEE Journal of Solid-State Circuits. 24:1184-1190
A single 3.3-V 16-Mbit DRAM with a 135-mm/sup 2/ chip size has been fabricated using a 0.5- mu m twin-well process with double-metal wiring. The array architecture, based on the twisted-bit-line (TBL) array, includes suitable dummy and space word-lin
This report identifies and discusses potential problems in the transportation of synthetic fuels (synfuels) which if allowed to persist unresolved will hamper the development of these energy materials between now and the year 2000. The emergence of t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d1d17e425ec0fe0e212366b418006d4f
https://doi.org/10.2172/6321088
https://doi.org/10.2172/6321088
Publikováno v:
1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.