Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Vyacheslav Rovner"'
Autor:
Jason D. Hibbeler, Lars W. Liebmann, Andrzej J. Strojwas, Larry Pileggi, Vyacheslav Rovner, Tejas Jhaveri
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 29:509-527
The financial backbone of the semiconductor industry is based on doubling the functional density of integrated circuits every two years at fixed wafer costs and die yields. The increasing demands for 'computational' rather than 'physical' lithography
Publikováno v:
SPIE Proceedings.
The traditional design rule paradigm of defining the illegal areas of the design space has been deteriorating at the advanced technology nodes. Radical design space restrictions, advocated by the regular design fabrics methodology, provide an opportu
Autor:
Vyacheslav Rovner, Kaushik Vaidyanathan, Andrzej J. Strojwas, Larry Pileggi, Daniel H. Morris
Publikováno v:
2010 Symposium on VLSI Technology.
Implementing sub-22nm designs using a limited set of pattern constructs can eliminate hotspot risk and can control systematic variability. Pattern regularity can incur a cell-level density penalty that is minimized or eliminated by co-optimization wi
Publikováno v:
SPIE Proceedings.
The semiconductor industry has pursued a rapid pace of technology scaling to achieve an exponential component cost reduction. Over the years the goal of technology scaling has been distilled down to two discrete targets. Process engineers focus on su
Autor:
Nathaniel D. Hieter, Tejas Jhaveri, Vyacheslav Rovner, Larry Pileggi, Lars W. Liebmann, Jason D. Hibbeler, Matthew Moe
Publikováno v:
SPIE Proceedings.
The concept of template-based design-technology co-optimization as a means of curbing escalating design complexity and increasing technology qualification risk is described. Data is presented highlighting the design efficacy of this proposal in terms
Publikováno v:
SPIE Proceedings.
The unavailability of extreme ultra violet lithography (EUVL) for mass production of the 22nm technology node has created a significant void for mainstream lithography solutions. To fill this void, alternate lithography solutions that were earlier de
Publikováno v:
DAC
Achieving the required time-to-market with economically acceptable yield levels and maintaining them in volume production has become a daunting task for the advanced technology nodes. These difficulties are primarily attributable to the increase in p
Autor:
Jason D. Hibbeler, Larry Pileggi, Tejas Jhaveri, Lars W. Liebmann, Greg Northrop, Vyacheslav Rovner
Publikováno v:
SPIE Proceedings.
The time-to-market driven need to maintain concurrent process-design co-development, even in spite of discontinuous patterning, process, and device innovation is reiterated. The escalating design rule complexity resulting from increasing layout sensi
Autor:
Ian Stobert, Vyacheslav Rovner, Tejas Jhaveri, Paul Karakatsanis, Lars W. Liebmann, Andrzej J. Strojwas, Larry Pileggi
Publikováno v:
SPIE Proceedings.
Cost and complexity associated with OPC and masks are rapidly increasing to the point that they could limit technology scaling in the future. This paper focuses on demonstrating the advantages of regular design fabrics for OPC simplification to enabl
Publikováno v:
Optical Microlithography XXI.
As the industry hits a road block with RETs that attempt to aggressively scale k1, we propose to extend the life of optical lithography by a complete co-optimization between circuit choices, layout patterns and lithography. We demonstrate that the ju