Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Vito Rutigliani"'
Publikováno v:
Microelectronic Engineering. 190:33-37
Most scanning electron microscope (SEM) measurements of pattern roughness today produce biased results, combining the true feature roughness with noise from the SEM. Further, the bias caused by SEM noise changes with measurement conditions and with t
Autor:
Hastings Simon Philip Spencer, Etienne de Poortere, Yongjun Wang, Vito Rutigliani, Guillaume Schelcher, Cyrus E. Tabery, Luke wang, Philippe Leray
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXIII.
Voltage contrast (VC) is a long known and well established technique to give combined inline sensitivity to electrically relevant measures of defectivity but also local defect isolation and integrated review SEM making the technique a critical piece
Autor:
Andreas Frommhold, Gian Lorusso, Guido Schiffelers, Gijsbert Rispens, Vito Rutigliani, Frieda Van Roey
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXIII.
In order to meet the tight Line Width Roughness (LWR) requirements for advanced metrology nodes, it is critical to be able to identify what the fundamental sources of roughness are, so that they can be individually minimized. In fact, more and more e
Autor:
Gian Lorusso, Evangelos Gogolides, Frieda Van Roey, Eva Giannatou, Harria Papagrorgiou, George Papavieros, Vassilios Constantoudis, Vito Rutigliani
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXIII.
Deep Learning (DL) techniques based on Denoising Convolutional Neural Networks (DeCNN) are applied in the denoising of SEM images of line patterns to contribute to noise-reduced (unbiased) LER nanometrology. The models of DeCNN are trained in a suffi
Autor:
Anne-Laure Charley, Frieda Van Roey, Toru Ishimoto, Chami Perera, Alain Moussa, Shunsuke Koshihara, Vito Rutigliani, Takumichi Sutani, Masami Ikota, Patrick P. Naulleau, Vassilios Constantoudis, Gian Lorusso, Chris A. Mack
Publikováno v:
Lorusso, GF; Sutani, T; Rutigliani, V; Van Roey, F; Moussa, A; Charley, AL; et al.(2018). Need for LWR metrology standardization: The imec roughness protocol. Journal of Micro/ Nanolithography, MEMS, and MOEMS, 17(4). doi: 10.1117/1.JMM.17.4.041009. Lawrence Berkeley National Laboratory: Retrieved from: http://www.escholarship.org/uc/item/1hz5s0w7
© 2018 Society of Photo-Optical Instrumentation Engineers (SPIE). As semiconductor technology keeps moving forward, undeterred by the many challenges ahead, one specific deliverable is capturing the attention of many experts in the field: line width
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::02d225ced8adc2830c49210a7aea46e4
http://www.escholarship.org/uc/item/1hz5s0w7
http://www.escholarship.org/uc/item/1hz5s0w7
Autor:
Gian Lorusso, George Papavieros, Vito Rutigliani, Chris A. Mack, Vassilios Constantoudis, Frederic Lazzarino, Evangelos Gogolides, Danilo De Simone, Gijsbert Rispens
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXII.
Power spectral density (PSD) analysis is playing more and more a critical role in the understanding of line-edge roughness (LER) and linewidth roughness (LWR) in a variety of applications across the industry. It is an essential step to get an unbiase
Autor:
Shunsuke Koshihara, Vito Rutigliani, Masami Ikota, Patrick P. Naulleau, Alain Moussa, Toru Ishimoto, Gian Lorusso, Frieda Van Roey, Takumichi Sutani, Anne-Laure Charley, Chris A. Mack, Vassilios Constantoudis
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXXII.
As semiconductor technology keeps moving forward, undeterred by the many challenges ahead, one specific deliverable is capturing the attention of many experts in the field: Line Width Roughness (LWR) specifications are expected to be less than 2nm in
Autor:
Brennan Peterson, Michael Kubis, Philippe Leray, Katja Viantka, Salman Mokhlespour, Sandip Halder, Koen van der Straten, Melisa Luca, Nader Shamma, Patrick Jaenen, Daniel Sobieski, Vito Rutigliani, David Hellin, Girish Dixit, Rich Wise, Giordano Cattani
Publikováno v:
Advances in Patterning Materials and Processes XXXV.
Continued improvement in pattern fidelity and reduction in total edge placement errors are critical to enable yield and scaling in advanced devices. In this work, we discuss patterning optimization in a combined two-layer process, using ArFi self-ali
Autor:
Gian Lorusso, Evangelos Gogolides, Vassilios Constantoudis, Vito Rutigliani, George Papavieros, Frieda Van Roey
Publikováno v:
Advanced Etch Technology for Nanopatterning VII.
The aim of this paper is to investigate the role of etch transfer in two challenges of LER metrology raised by recent evolutions in lithography: the effects of SEM noise and the cross-line and edge correlations. The first comes from the ongoing scali
Autor:
Danilo De Simone, Victor M. Blanco Carballo, Yannick Vesters, Gian Lorusso, Peter De Bisschop, Vito Rutigliani, Geert Vandenberghe
Publikováno v:
Extreme Ultraviolet (EUV) Lithography IX.
In the last year, the continuous efforts on the development of extreme ultraviolet (EUV) lithography has allowed to push the lithographic performance of the EUV photoresists on the ASML NXE:3300 full field exposure tool. Today imec N7 node (equivalen