Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Vishwas Gosain"'
Publikováno v:
Journal of King Saud University: Engineering Sciences, Vol 34, Iss 3, Pp 180-188 (2022)
In this paper, a new adiabatic logic family named as adiabatic differential cascode voltage-switch logic (A-DCVSL) for low power applications is presented. The family operates on a two-phase split level sinusoidal power clock instead of four-phase tr
Externí odkaz:
https://doaj.org/article/c2b30e24e85444d691224fe591a49149
Publikováno v:
2020 4th International Conference on Electronics, Communication and Aerospace Technology (ICECA).
Post silicon validation is considered as an important step in the life-cycle of an integrated circuit. With shrinking transistor size and increasing design complexity, it becomes imperative for a design to undergo silicon characterization to check it
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::26808ff670b13e4ece7853bc54d106ed
https://doi.org/10.1109/iceca49313.2020.9297569
https://doi.org/10.1109/iceca49313.2020.9297569
Autor:
Amit Patel, Vishwas Gosain
Publikováno v:
2020 4th International Conference on Electronics, Communication and Aerospace Technology (ICECA).
The aggressive scaling of devices and increasing density of circuits at times does not allow inbuilt circuits for testing of timing parameters, which increases the emphasis on post-silicon validation for testing of these parameters. In this paper, a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4f0b81642876c2fb475ac840fa6acc35
https://doi.org/10.1109/iceca49313.2020.9297466
https://doi.org/10.1109/iceca49313.2020.9297466
Arithmetic Logic Unit Using Diode Free Adiabatic Logic and Selection Unit for Adiabatic Logic Family
Publikováno v:
2018 5th International Conference on Signal Processing and Integrated Networks (SPIN).
Reduction in energy dissipation is an active area of research. Systems which consume power require the deployment of expensive cooling systems. In this paper a 1-bit ALU circuit has been designed in diode free adiabatic logic methodology which has mu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::abbd293a4ced5b1313b5b3e6e506b5d1
https://doi.org/10.1109/spin.2018.8474277
https://doi.org/10.1109/spin.2018.8474277
Publikováno v:
2017 2nd International Conference on Telecommunication and Networks (TEL-NET).
Reduction in power dissipation is one of the major concerns for researchers in electronics industry. Carry look ahead adder is widely used for fast calculations but it dissipates lot of power due to which expensive cooling system has to be deployed.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2320a8e9d75a14708ab84ac3971240f2
https://doi.org/10.1109/tel-net.2017.8343535
https://doi.org/10.1109/tel-net.2017.8343535