Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Vincent Bourguet"'
Autor:
Robson Nunes de Lima, Gabriel C. L. Cunha, Sebastian Y. C. Catunda, Carlos Massella Junior, José B. Sales Filho, Vincent Bourguet, Diomadson Belfort
Publikováno v:
Microelectronics Journal. 52:1-10
The design of a fully integrated multi-standard UHF receiver front-end to be embedded in environmental data collection satellites is proposed. The circuit operates under the requirements of both SBCDA and the ARGOS 3. For that, the specifications of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::67449f683ee70839adc2eabc59f9baf9
https://doi.org/10.1016/j.mejo.2016.03.001
https://doi.org/10.1016/j.mejo.2016.03.001
Autor:
Diomadson Belfort, Fernando Rangel de Sousa, Michel Santana de Deus, Sebastian Y. C. Catunda, Vincent Bourguet
Publikováno v:
I2MTC
With the purpose of realizing an integrated circuit and knowing that the capacitors generally use less space than resistors in the integration process, we propose an architecture of a pulse-width programmable linear amplifier that uses a switched cap
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b029d1080bda5569e93bcb9fedc4f963
https://doi.org/10.1109/i2mtc.2014.6860781
https://doi.org/10.1109/i2mtc.2014.6860781
Autor:
Sebastian Y. C. Catunda, Robson Nunes de Lima, Michel Vasilevski, M. Barros, C. C. A. Mendes, Vincent Bourguet, G. C. L. Cunha
Publikováno v:
LASCAS
The specifications for the front-end design of a SBCD/ARGOS-3 integrated UHF receiver in a 0.13 μm star-dard CMOS process are derived. A low intermediate frequency architecture is presented, in which a 3-stage low-noise amplifier, a passive mixer an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ad17fd0173c90e48c21db9ea4935530c
https://doi.org/10.1109/lascas.2014.6820286
https://doi.org/10.1109/lascas.2014.6820286
Publikováno v:
ICECS
In this paper, we present the architecture of a bandpass sigma-delta modulator combining LC and two-channel time-interleaved resonators. The impact of using a two-channel time-interleaved resonator is discussed first. Then, we propose a general metho
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bb3289e4f0c5f1bf60f76e92fa067a22
https://doi.org/10.1109/icecs.2012.6463728
https://doi.org/10.1109/icecs.2012.6463728
Autor:
Hani Ragai, Mohamed Dessouky, A. Cathelln, Diaa Khalil, Marie-Minerve Louerat, Vincent Bourguet
Publikováno v:
ISQED 2005-6th International Symposium on Quality of Electronic Design
ISQED 2005-6th International Symposium on Quality of Electronic Design, Mar 2005, San Jose, California, United States. pp.143-147, ⟨10.1109/ISQED.2005.54⟩
ISQED
ISQED 2005-6th International Symposium on Quality of Electronic Design, Mar 2005, San Jose, California, United States. pp.143-147, ⟨10.1109/ISQED.2005.54⟩
ISQED
International audience; In this paper, design and measurement results of a test chip that intends to evaluate differences between layout techniques for rectangular unit-capacitor arrays are introduced. Precision capacitor ratios are compared using a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d4a8f594a18f4efdeb5161cd7dbdbc3c
https://hal.science/hal-01418263
https://hal.science/hal-01418263
Publikováno v:
MWSCAS 2004-47th Midwest Symposium on Circuits and Systems
MWSCAS 2004-47th Midwest Symposium on Circuits and Systems, Jul 2004, Hiroshima, Japan. pp.432-488
MWSCAS 2004-47th Midwest Symposium on Circuits and Systems, Jul 2004, Hiroshima, Japan. pp.432-488
International audience; In this paper, we present a new flow for analog design automation. It is an electrical and layout co-design flow which is based on the precise knowledge of the process electrical models and layout. This flow is as fast as a la
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d3732379f7faab77d6e4650723086c0c
https://doi.org/10.1109/mwscas.2004.1354033
https://doi.org/10.1109/mwscas.2004.1354033
Autor:
Andreia Cathelin, Mohamed Dessouky, Marie-Minerve Louerat, Vincent Bourguet, Diaa Khalil, Hani Ragai
Publikováno v:
Scopus-Elsevier
ICEEC 2004-International Conference on Electrical Electronic and Computer Engineering
ICEEC 2004-International Conference on Electrical Electronic and Computer Engineering, Sep 2004, Cairo, Egypt. pp.481-484, ⟨10.1109/ICEEC.2004.1374505⟩
ICEEC 2004-International Conference on Electrical Electronic and Computer Engineering
ICEEC 2004-International Conference on Electrical Electronic and Computer Engineering, Sep 2004, Cairo, Egypt. pp.481-484, ⟨10.1109/ICEEC.2004.1374505⟩
In this paper, a layout scheme for accurate common-centroid rectangular unit-capacitor arrays is presented with detailed explanation of the rules used to improve matching. This layout technique is combined with a common-centroid arbitrary-value capac
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bbd3326190850bd823abaaad7cf7258b
http://www.scopus.com/inward/record.url?eid=2-s2.0-16244390868&partnerID=MN8TOARS
http://www.scopus.com/inward/record.url?eid=2-s2.0-16244390868&partnerID=MN8TOARS