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pro vyhledávání: '"Vinayak Krishna Bhat"'
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9789811506253
The most critical constraints in System on chip (SoC’s), to determine the performance are area and power. As technology scales down, innovative clock tree design techniques are required to improve the skew. Hence, skew minimization design should be
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::785f1507025fdaf9bee94c0d3ef89831
https://doi.org/10.1007/978-981-15-0626-0_26
https://doi.org/10.1007/978-981-15-0626-0_26