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pro vyhledávání: '"Viktor Antoniuk"'
Autor:
Oleksandr Drozd, Grzegorz Nowakowski, Anatoliy Sachenko, Viktor Antoniuk, Volodymyr Kochan, Myroslav Drozd
Publikováno v:
Sensors, Vol 21, Iss 3, p 792 (2021)
This paper presents a power-oriented monitoring of clock signals that is designed to avoid synchronization failure in computer systems such as FPGAs. The proposed design reduces power consumption and increases the power-oriented checkability in FPGA
Externí odkaz:
https://doaj.org/article/ba61e7711e0c49ee999aa78b647dc0c4
Autor:
Myroslav Drozd, Andrzej Rucinski, Yulian Sulima, Oleksandr Drozd, Viktor Antoniuk, Igor Kovalev
Publikováno v:
Herald of Advanced Information Technology. 3:252-262
The article is devoted to analysis of problems of the computer system development in the domain of critical applications. The main trends of this development were highlighted, which consisted in increased demands for performance based on parallelizat
Publikováno v:
International Journal of Computing. :118-126
This paper is dedicated to the problem of the circuit checkability of components in the safety-related systems, which operate objects of the increased risk and are aimed at ensuring safety of both a system and a control object for accident prevention
Autor:
Viktor Antoniuk, Volodymyr Kochan, Anatoliy Sachenko, Myroslav Drozd, Oleksandr Drozd, Grzegorz Nowakowski
Publikováno v:
Sensors, Vol 21, Iss 792, p 792 (2021)
Sensors (Basel, Switzerland)
Sensors
Volume 21
Issue 3
Sensors (Basel, Switzerland)
Sensors
Volume 21
Issue 3
This paper presents a power-oriented monitoring of clock signals that is designed to avoid synchronization failure in computer systems such as FPGAs. The proposed design reduces power consumption and increases the power-oriented checkability in FPGA
Publikováno v:
Computer Modeling and Intelligent Systems. 2353:924-934
Publikováno v:
2018 14th International Conference on Advanced Trends in Radioelecrtronics, Telecommunications and Computer Engineering (TCSET).
This paper is devoted to a problem of the hidden faults, which can be accumulated in digital components of safety-related systems during a long term normal mode and reduce fault tolerance of circuits and safety of system in the most responsible emerg