Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Vijendera Kumar"'
Autor:
Rohit Sharma, Vijendera Kumar, Bhyrav M. Mutnury, Sunil Pathania, Mallikarjun Vasa, Sukumar Muthusamy, P K Seema
Publikováno v:
2020 IEEE 29th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).
At high-speeds, careful analysis is required at the design stage to ensure robust signal integrity (SI) in high-speed printed circuit boards (PCBs). Signal loss in PCBs is predominantly due to conductor loss, dielectric loss and impedance mismatch.In
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b6ba1d005acf14221d68a2d625a6e768
https://doi.org/10.1109/epeps48591.2020.9231336
https://doi.org/10.1109/epeps48591.2020.9231336
Autor:
Sunil Pathania, P K Seema, Sukumar Muthusamy, Rohit Sharma, Vijendera Kumar, Sanjay Kumar, Mallikarjun Vasa, Bhyrav M. Mutnury, Ashish Shrivastava
Publikováno v:
2019 Electrical Design of Advanced Packaging and Systems (EDAPS).
Historically, signal integrity (SI) modeling and analysis was performed standalone without considering non-electrical aspects of the design. Going forward, this approach may not be viable to model high-speed serial links. Increased demand for higher
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::831ae63529f99dc2ba70a973367fbd95
https://doi.org/10.1109/edaps47854.2019.9011670
https://doi.org/10.1109/edaps47854.2019.9011670
Autor:
Sanjay Kumar, Gowri Anand, Bhyrav M. Mutnury, Sukumar Muthusamy, Mallikarjun Vasa, Vijendera Kumar
Publikováno v:
2018 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS).
While designing any interface, the impact of channel components like vias, trace, materials, stack-up, connectors, cables, transmitter/receiver packages, and other parasitic effects need to be considered. This paper discusses the impact of via and mo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::daa5ae28dd1fb76e2252abab7659ad99
https://doi.org/10.1109/edaps.2018.8680855
https://doi.org/10.1109/edaps.2018.8680855
Publikováno v:
2018 15th International Conference on ElectroMagnetic Interference & Compatibility (INCEMIC).
Signal speeds of high speed channels double almost every generation and with increasing speeds, even a slight impedance discontinuity in the channel can adversely affect signal quality. Channel discontinuities come from several sources and each sourc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d25af18268ef97d68b2326d823664586
https://doi.org/10.1109/incemic.2018.8704557
https://doi.org/10.1109/incemic.2018.8704557
Autor:
Bhyrav M. Mutnury, Doug Wallace, Sanjay Kumar, Mallikarjun Vasa, Vijendera Kumar, Gowri Anand
Publikováno v:
2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).
Today's varied server applications necessitate a variety of storage requirements. The advent of SAS 4.0 technology represents an evolutionary advancement in storage IO to meet the growing demands of today's storage environments. With unprecedented pe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::857ce9e6103ea1613749509596061d80
https://doi.org/10.1109/epeps.2017.8329765
https://doi.org/10.1109/epeps.2017.8329765
Publikováno v:
2016 International Conference on ElectroMagnetic Interference & Compatibility (INCEMIC).
High-speed server design is becoming challenging with the increase of data transfer rates in high-speed serial I/O interconnections. As the data rates go beyond 25 Gbps, the interference resulted from frequency dependent losses and reflection noises
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b9acb2c4fbe1e8ab1e52129cc63a2af7
https://doi.org/10.1109/incemic.2016.7921459
https://doi.org/10.1109/incemic.2016.7921459
Publikováno v:
2014 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS).
Blade servers are constantly moving towards higher data rates and smaller form factor resulting in complex routing choices to accommodate various chassis configurations. Flexible printed circuit (FPC) cables or flex cables serve as a good choice for
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f0e0897716951147303893f5913c94b3
https://doi.org/10.1109/edaps.2014.7030820
https://doi.org/10.1109/edaps.2014.7030820
Publikováno v:
2014 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS); 2014, p1-5, 5p
Publikováno v:
2014 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS); 2014, p49-52, 4p
Publikováno v:
2014 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS); 2014, p1-10, 10p