Zobrazeno 1 - 10
of 64
pro vyhledávání: '"Victor Vartanian"'
Autor:
Henry C. Kapteyn, Robert Karl, Dennis F. Gardner, Elisabeth R. Shanblatt, Margaret M. Murnane, Charles Bevis, Christina L. Porter, Giulia F. Mancini, Victor Vartanian, Michael Tanksalvala, Daniel E. Adams
Publikováno v:
Nano Letters
We demonstrate quantitative, chemically specific imaging of buried nanostructures, including oxidation and diffusion reactions at buried interfaces, using nondestructive tabletop extreme ultraviolet (EUV) coherent diffractive imaging (CDI). Copper na
Publikováno v:
ECS journal of solid state science and technology : JSS
In this paper, we attempt to understand the physico-chemical changes that occur in devices during device "burn-in". We discuss the use of low frequency dielectric spectroscopy to detect, characterize and monitor changes in electrical defects present
Autor:
Tyler Barbera, Gert J. Leusink, Gyanaranjan Pattanaik, Fred Wafula, Larry Smith, Brian Sapp, Victor Vartanian, Toshio Hasegawa, Steve Golovato, Alison Gracias, Kaoru Maekawa, Shan Hu, Steve Olson, Jack Enloe, Kai-Hung Yu, Klaus Hummler
Publikováno v:
International Symposium on Microelectronics. 2014:000001-000007
SEMATECH evaluated the impact of various process options on the overall manufacturing cost of a TSV module, from TSV lithography and etch through post-plate CMP. The purpose of this work was to understand the cost differences of these options in orde
Autor:
Tyler Barbera, Klaus Hummler, Gyanaranjan Pattanaik, Larry Smith, Gert J. Leusink, Steve Olson, Brian Sapp, Kai-Hung Yu, Shan Hu, Akira Fujita, Alison Gracias, Jack Enloe, Kaoru Maekawa, Kenneth Matthews, Victor Vartanian, Fred Wafula
Publikováno v:
International Symposium on Microelectronics. 2014:000794-000803
Even as unit processes for high aspect ratio (HAR) through silicon via (TSV) mid-wafer front-side processing are becoming relatively mature, scaling of the TSVs and reduction of cost of ownership (COO) drive significant innovations in processes, equi
In-line metrologies currently used in the semiconductor industry are being challenged by the aggressive pace of device scaling and the adoption of novel device architectures. Metrology and process control of three-dimensional (3-D) high-aspect-ratio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e33626d17422af00d17842eff4151379
https://europepmc.org/articles/PMC4986611/
https://europepmc.org/articles/PMC4986611/
Autor:
John Clark, John Taddei, Michael Hatzistergos, Kenji Nulman, Laura Mauer, Stephen Olson, Victor Vartanian
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
Deep Reactive Ion Etch (DRIE) processes used to form Through Silicon Vias (TSVs) achieve high aspect ratios by depositing polymer on the vertical sidewalls of the features. This polymer material must be removed before other materials (including diele
Autor:
Daniel E. Adams, Dennis F. Gardner, Margaret M. Murnane, Henry C. Kapteyn, Michael Tanksalvala, Giulia F. Mancini, Elisabeth R. Shanblatt, Victor Vartanian, Christina L. Porter, Robert Karl, Charles Bevis
Publikováno v:
Imaging and Applied Optics 2016.
We demonstrate imaging of optically opaque nanostructures buried beneath a thick layer of aluminum using a tabletop extreme ultraviolet source. Our non-destructive technique uncovers interfacial diffusion and oxidation between layers, validated using
Autor:
Doron Arazi, Aaron Cordes, Pete Lipscomb, Kye-Weon Kim, Victor Vartanian, Milt Godwin, Benjamin Bunday, John Allgair, Michael Bishop
Publikováno v:
ECS Transactions. 18:151-160
Successful in-line metrology is imperative for a fab to achieve profitable production yields. Full functionality and high circuit speed are achieved only through control of defectivity and tight distributions of feature sizes. In-line monitoring of a
Autor:
Xuecheng Tao, Xi Wang, Yang Shu, Zhang Xiao-Yan, Wang David, Brian Sapp, Victor Vartanian, Chen Fu-Ping
Publikováno v:
2015 26th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
In this paper, the method of space alternated phase shift (SAPS) megasonic technology is applied for post-etch (Bosch) TSV wafers cleaning process. The SAPS technology provides uniform sonic energy on each point of entire wafer by alternating phase o
Publikováno v:
Handbook of 3D Integration
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::22038d81a6c357d85b5c23cd00f6d11c
https://doi.org/10.1002/9783527670109.ch29
https://doi.org/10.1002/9783527670109.ch29