Zobrazeno 1 - 10
of 47
pro vyhledávání: '"Victor N. Kravets"'
Autor:
Jianli Chen, Iris Hui-Ru Jiang, Jinwook Jung, Andrew B. Kahng, Seungwon Kim, Victor N. Kravets, Yih-Lang Li, Ravi Varadarajan, Mingyu Woo
Publikováno v:
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::47b3a7ff97ae53606f43b5c659c26404
https://doi.org/10.1109/iccad51958.2021.9643553
https://doi.org/10.1109/iccad51958.2021.9643553
Autor:
Shih-Ting Lin, Andrew B. Kahng, Iris Hui-Ru Jiang, Jinwook Jung, Mingyu Woo, Yih-Lang Li, Victor N. Kravets, Jianli Chen
Publikováno v:
ICCAD
We describe the RDF-2020 release of the IEEE CEDA DATC Robust Design Flow (RDF). RDF-2020 extends the previous four years of DATC efforts to (i) preserve and integrate leading research codes, including from past academic contests, and (ii) provide a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0de659069c328d9d5d3f58e1161bf98f
https://doi.org/10.1145/3400302.3415742
https://doi.org/10.1145/3400302.3415742
Publikováno v:
DATE
The behavioral revisions to the design are frequent in the late stage of the semiconductor chip development. Quite often, their realization emphasizes incrementality that seeks minimum perturbation of the existing implementation. This tutorial paper
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e85058cd38f14d9476070ec4771938e9
https://doi.org/10.23919/date48585.2020.9116310
https://doi.org/10.23919/date48585.2020.9116310
Publikováno v:
DATE
Engineering change order (ECO) becomes a crucial element in VLSI design flow to rectify function or fix non-functional requirements in late design stages. Even though commercial ECO solutions are available, ECO remains much room for improvement due t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::88f0a74047e4be61276ed8893f757354
https://doi.org/10.23919/date48585.2020.9116504
https://doi.org/10.23919/date48585.2020.9116504
Autor:
Shih-Ting Lin, Jinwook Jung, Iris Hui-Ru Jiang, Andrew B. Kahng, Victor N. Kravets, Jianli Chen, Yih-Lang Li, Mingyu Woo
Publikováno v:
ICCAD
We describe a new RDF-2019 release of the IEEE CEDA DATC Robust Design Flow (RDF). RDF-2019 enhances the DATC RDF to span the entire RTL-to-GDS IC implementation flow, from logic synthesis to detailed routing. The new release represents a significant
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d6be3ef373a1860cbc6dd59858672828
https://doi.org/10.1109/iccad45719.2019.8942120
https://doi.org/10.1109/iccad45719.2019.8942120
Publikováno v:
DAC
The task of an engineering change order (ECO) is to update the current implementation of a design according to its revised specification with minimum modification. Prior studies show that the amount of design modification majorly depends on the selec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::76b2cbb42b7ed01f0f12bf4ab36ff4e3
https://doi.org/10.1145/3316781.3317790
https://doi.org/10.1145/3316781.3317790
Autor:
Yih-Lang Li, Jianli Chen, Jinwook Jung, Gi-Joon Nam, Shih-Ting Lin, Victor N. Kravets, Iris Hui-Ru Jiang
Publikováno v:
ICCAD
In this paper, we present DATC Robust Design Flow (RDF) from logic synthesis to detailed routing. We further include detailed placement and detailed routing tools based on recent EDA research contests. We also demonstrate RDF in a scalable cloud infr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a57975e29c90b4e4224dbf3966ac11ac
https://doi.org/10.1145/3240765.3272126
https://doi.org/10.1145/3240765.3272126
Autor:
Chau-Chin Huang, Mihir Choudhury, Giovanni De Micheli, Gi-Joon Nam, Cunxi Yu, Maciej Ciesielski, Victor N. Kravets, Andrew Sullivan
Publikováno v:
2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
ISVLSI
ISVLSI
Sequential circuits are combinational circuits that are separated by registers. Retiming is considered as the most promising technique for optimizing sequential circuits, that involves moving the edge-triggered registers across the combinational logi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::46b2433db21f532617178af0d0d61d8b
Autor:
Victor N. Kravets
Publikováno v:
Proceedings of the IEEE. 103:2076-2092
Over three decades ago an algebraic factoring algorithm was created as part of active logic synthesis efforts in the semiconductor industry. It initiated logic synthesis successes and steered synthesis in the direction of practical design tools: they
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::94d25ec58e97df53cb8c34dcfe862378
https://doi.org/10.1109/jproc.2015.2480891
https://doi.org/10.1109/jproc.2015.2480891
Autor:
Yan-Shiun Wu, Jinwook Jung, Pei-Yu Lee, Yih-Lang Li, Iris Hui-Ru Jiang, Victor N. Kravets, Gi-Joon Nam, Nima Karimpour Darav, Laleh Behjat
Publikováno v:
ICCAD
In this paper, we present DATC Robust Design Flow Database covering the stages from logic synthesis to physical design [1]. Based on this database, design flow and cross-stage optimization research can be conducted via various EDA tools developed fro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ca1db3f120277d5502149ee7698ffaef
https://doi.org/10.1109/iccad.2017.8203871
https://doi.org/10.1109/iccad.2017.8203871