Zobrazeno 1 - 10
of 55
pro vyhledávání: '"Vianney Lapotre"'
Autor:
Maria Mushtaq, Jeremy Bricq, Muhammad Khurram Bhatti, Ayaz Akram, Vianney Lapotre, Guy Gogniat, Pascal Benoit
Publikováno v:
IEEE Access, Vol 8, Pp 83871-83900 (2020)
High resolution and stealthy attacks and their variants such as Flush+Reload, Flush+Flush, Prime+Probe, Spectre and Meltdown have completely exposed the vulnerabilities in Intel's computing architecture over the past few years. Mitigation techniques
Externí odkaz:
https://doaj.org/article/296b065d6a3c4dcca7b2fecb8cafcdbd
Publikováno v:
IEEE Access, Vol 8, Pp 70836-70860 (2020)
Cache Side Channel Attacks (SCAs) have gained a lot of attention in the recent past. Since, these attacks exploit the caching hardware vulnerabilities, they are fast and dangerous. Detection of cache side channel attacks is an important step towards
Externí odkaz:
https://doaj.org/article/1204995264e34644a599ce8edb821745
Publikováno v:
EURASIP Journal on Advances in Signal Processing, Vol 2017, Iss 1, Pp 1-15 (2017)
Abstract The multiplication of connected devices goes along with a large variety of applications and traffic types needing diverse requirements. Accompanying this connectivity evolution, the last years have seen considerable evolutions of wireless co
Externí odkaz:
https://doaj.org/article/ae0f16e1d24a4363ba648b4f3884b874
Publikováno v:
Annals of Telecommunications. 77:731-747
Publikováno v:
IEEE International Symposium on Circuits and Systems (ISCAS)
IEEE International Symposium on Circuits and Systems (ISCAS), Oct 2020, Seville, Spain
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
IEEE International Symposium on Circuits and Systems (ISCAS), Oct 2020, Seville, Spain. ⟨10.1109/ISCAS45731.2020.9180599⟩
ISCAS
HAL
IEEE International Symposium on Circuits and Systems (ISCAS), Oct 2020, Seville, Spain
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
IEEE International Symposium on Circuits and Systems (ISCAS), Oct 2020, Seville, Spain. ⟨10.1109/ISCAS45731.2020.9180599⟩
ISCAS
HAL
International audience; In this paper, we present a lightweight secured AES hardware implementation designed to further resist to Side Channel Attacks relying on Power Analysis. The proposed architecture is based on an 8-bit data-path, and the protec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fa6a74dc8d2a12b8b8d8b1db49446ff9
https://hal.archives-ouvertes.fr/hal-02511667
https://hal.archives-ouvertes.fr/hal-02511667
Publikováno v:
ACM Transactions on Embedded Computing Systems (TECS)
ACM Transactions on Embedded Computing Systems (TECS), ACM, 2018, 17 (2), pp.1-31. ⟨10.1145/3168383⟩
ACM Transactions on Embedded Computing Systems (TECS), ACM, 2018, 17 (2), pp.1-31. ⟨10.1145/3168383⟩
International audience; Current cache side-channel attacks (SCAs) countermeasures have not been designed for many-core architectures and need to be revisited in order to be practical for these new technologies. Spatial isolation of resources for sens
Publikováno v:
Information Systems
Information Systems, Elsevier, In press, ⟨10.1016/j.is.2020.101524⟩
Information Systems, Elsevier, In press, ⟨10.1016/j.is.2020.101524⟩
International audience; Timing-based side-channels play an important role in exposing the state of a process execution on underlying hardware by revealing information about timing and access patterns. Side-channel attacks (SCAs) are powerful cryptana
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bb2ce1277d6f671ba1729f468c2a7f7b
https://hal.archives-ouvertes.fr/hal-02537540
https://hal.archives-ouvertes.fr/hal-02537540
Publikováno v:
Journal of Information Security and Applications
Journal of Information Security and Applications, 2020, 55, pp.102627. ⟨10.1016/j.jisa.2020.102627⟩
Journal of Information Security and Applications, 2020
Journal of Information Security and Applications, 2020, 55, pp.102627. ⟨10.1016/j.jisa.2020.102627⟩
Journal of Information Security and Applications, 2020
International audience; Homomorphic Encryption (HE) aims to perform computations on encrypted data. Still in research stage, a lot of HE schemes have been created but their comparison remains costly as execution exhibits prohibitive costs. PAnTHErS i
Publikováno v:
Journal of Systems Architecture
Journal of Systems Architecture, Elsevier, 2020, 104, pp.101698. ⟨10.1016/j.sysarc.2019.101698⟩
Journal of Systems Architecture, Elsevier, 2020, 104, pp.101698. ⟨10.1016/j.sysarc.2019.101698⟩
International audience; Cache-based side-channel attacks (SCAs) are becoming a security threat to the emerging computing platforms. To mitigate these attacks, numerous countermeasures have been proposed. However, these countermeasures require either
Autor:
Arnab Kumar Biswas, Guillaume Hiet, Pascal Cotret, Vianney Lapotre, Guy Gogniat, Muhammad Abdul Wahab, Mounir Nasr Allah
Publikováno v:
AsianHOST 2018-Asian Hardware Oriented Security and Trust Symposium
AsianHOST 2018-Asian Hardware Oriented Security and Trust Symposium, Dec 2018, Hong Kong, China. pp.1-13, ⟨10.1109/asianhost.2018.8607177⟩
AsianHOST
AsianHOST 2018-Asian Hardware Oriented Security and Trust Symposium, Dec 2018, Hong Kong, China. pp.1-13, ⟨10.1109/asianhost.2018.8607177⟩
AsianHOST
Most of hardware-assisted solutions for software security, program monitoring, and event-checking approaches require instrumentation of the target software, an operation which can be performed using an SBI (Static Binary Instrumentation) or a DBI (Dy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ffa2274481577dcb8bbb1c342cb4e40d
https://hal.science/hal-01911621
https://hal.science/hal-01911621