Zobrazeno 1 - 10
of 130
pro vyhledávání: '"Valery Sklyarov"'
Publikováno v:
International Journal of Reconfigurable Computing, Vol 2016 (2016)
Popcount computations are widely used in such areas as combinatorial search, data processing, statistical analysis, and bio- and chemical informatics. In many practical problems the size of initial data is very large and increase in throughput is imp
Externí odkaz:
https://doaj.org/article/6789f1f6931e4087bfc5d074daeea008
Publikováno v:
2021 IEEE 15th International Conference on Application of Information and Communication Technologies (AICT).
Autor:
Iouliia Skliarova, Valery Sklyarov
Publikováno v:
Automation and Remote Control. 78:100-112
It was proposed to use the hardware accelerators for analysis and data processing in the systems of logic control on a chip including the interacting processor system, memory, and configurable logic components. The data processing expected execution
Autor:
Valery Sklyarov, Iouliia Skliarova
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9783030207205
For those problems allowing high-level parallelism to be applied, hardware implementations are generally faster than relevant software running in general-purpose and application-specific computers. However, software is more flexible and easily adapta
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5006a6d8c888cd955a8252c3ad5129aa
https://doi.org/10.1007/978-3-030-20721-2_6
https://doi.org/10.1007/978-3-030-20721-2_6
Autor:
Valery Sklyarov, Iouliia Skliarova
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9783030207205
This chapter demonstrates distinctive features of FPGA-based hardware accelerators. In order to compete with the existing alternative solutions (both in hardware and in software) a wide level parallelism must be implemented in circuits with small pro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::48af5f92f994c3a30b3f3694a7be89ff
https://doi.org/10.1007/978-3-030-20721-2_2
https://doi.org/10.1007/978-3-030-20721-2_2
Autor:
Valery Sklyarov, Iouliia Skliarova
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9783030207205
This chapter is dedicated to several computational problems that can efficiently be solved in FPGA-based hardware accelerators. The base of them, which is described in detail, is Hamming weight counting and comparison, which has many practical applic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::607c586614927893ee103e4e71f74b42
https://doi.org/10.1007/978-3-030-20721-2_5
https://doi.org/10.1007/978-3-030-20721-2_5
Autor:
Valery Sklyarov, Iouliia Skliarova
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9783030207205
This chapter is dedicated to searching networks, which permit to find extreme values in a set of data and to check if there are items satisfying some predefined conditions or limitations, indicated by given thresholds. The simplest task is retrieving
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dc1f40441c870979b702bf835fd61d04
https://doi.org/10.1007/978-3-030-20721-2_3
https://doi.org/10.1007/978-3-030-20721-2_3
Autor:
Iouliia Skliarova, Valery Sklyarov
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9783030207205
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b604b63e888738a438e0d87fe5706231
https://doi.org/10.1007/978-3-030-20721-2
https://doi.org/10.1007/978-3-030-20721-2
Autor:
Valery Sklyarov, Iouliia Skliarova
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9783030207205
This chapter gives a short introduction to reconfigurable devices (Field-Programmable Gate Arrays—FPGA and hardware programmable Systems-on-Chip—SoC), design languages, methods, and tools that will be used in the book. The core reconfigurable ele
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6a8edf28a62306bd7853ebd34c8da9ba
https://doi.org/10.1007/978-3-030-20721-2_1
https://doi.org/10.1007/978-3-030-20721-2_1
The paper suggests a technique for fast data processing of unique and constrained items. The technique is based on two methods that involve: 1) address-based data sorting; and 2) communication-time networks. Input data are received one by one from a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fe7bafcd374d96f5962c468aea661520
https://zenodo.org/record/1121263
https://zenodo.org/record/1121263