Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Valeriy Stikanov"'
Autor:
Christian Walczyk, Enrique Miranda, Piero Olivo, Alessandro Grossi, Valeriy Stikanov, Cristian Zambelli, Christian Wenger
Publikováno v:
Solid-State Electronics
The forming process, which corresponds to the activation of the switching filament in Resistive Random Access Memory (RRAM) arrays, has a strong impact on the cells’ performances. In this paper we characterize and compare different pulse forming te
Autor:
Christian Wenger, Enrique Miranda, Thomas Schroeder, Christian Walczyk, Valeriy Stikanov, Damian Walczyk, Gunter Schoof, Jordi Suñé, Rolf Kraemer, Bernd Tillack, Piero Olivo, A. Fox, Alessandro Grossi, Cristian Zambelli, Alessandro Feriani
Publikováno v:
IEEE Transactions on Electron Devices
The intercell variability of the initial state and the impact of dc and pulse forming on intercell variability as well as on intracell variability in TiN/HfO2/Ti/TiN 1 transistor – 1 resistor (1T-1R) devices in 4-kb memory arrays were investigated.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9e2ee63061bba4b8bbd46d9b14126207
http://hdl.handle.net/11392/2328915
http://hdl.handle.net/11392/2328915
Autor:
Piero Olivo, Christian Wenger, Enrique Miranda, Valeriy Stikanov, Christian Walczyk, Thomas Schroeder, Alessandro Grossi, Cristian Zambelli
Publikováno v:
2015 IEEE International Memory Workshop (IMW)
In this work, cells behavior during forming is monitored through an incremental pulse and verify algorithm on 4kbit RRAM arrays. This technique allows recognising different cell behaviors in terms of read-verify current oscillation: the impact of the
Autor:
Damian Walczyk, Valeriy Stikanov, Piero Olivo, Bernd Tillack, Alessandro Grossi, Cristian Zambelli, Rolf Kraemer, Jarek Dabrowski, Thomas Schroeder, Christian Walczyk
Publikováno v:
2014 IEEE 6th International Memory Workshop (IMW).
In this work a SET/RESET investigation in cycling on ReRAM arrays has been performed, in order to find the most reliable SET/RESET operation conditions. The analysis will compare DC and pulsed SET/RESET operations featuring different durations and vo
Autor:
Valeriy Stikanov, Alessandro Grossi, Damian Walczyk, Cristian Zambelli, Bernd Tillack, Christian Walczyk, T. Bertaud, Thomas Schroeder, Piero Olivo
The design and the manufacturing of ReRAM test structures allow deeper insight in the performance of the FORM-ING, RESET, and SET operations at array level, providing details on the process induced variability of the technology, and on the potential
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::03ea9d899ffb56c10d2544a0658ea026
http://hdl.handle.net/11392/2007212
http://hdl.handle.net/11392/2007212
Autor:
A. Fox, Ch. Wenger, A. Scheit, Thomas Schroeder, M. Lukosius, Bernd Tillack, Dirk Wolansky, R. Korolevych, Gunter Schoof, T. Bertaud, C. Wolf, Valeriy Stikanov, Rolf Kraemer, Malgorzata Sowinska, Ch. Walczyk, Mirko Fraschke, Damian Walczyk, M. A. Schubert
Publikováno v:
2012 International Semiconductor Conference Dresden-Grenoble (ISCDG).
This work reports the bipolar resistive switching behavior of more than 100 back-end-of-line (BEOL) integrated 600×600nm2 TiN/HfO 2 /Ti/TiN MIM devices in a 4 kbit memory array. Reliable current-voltage switching characteristics were only observed f
Publikováno v:
2010 20th International Crimean Conference "Microwave & Telecommunication Technology".
This paper presents the design and implementation of the high output swing voltage driver. Designed and fabricated in 0.25 um SiGe BiCMOS technology the driver delivers 10 Vpp output differential voltage swing at 2 Gb/s. The power consumption of the
Autor:
Bernd Heinemann, F. Korndorfer, Peter Zaumseil, B. Senapati, A. Fox, K.E. Ehwald, Wolfgang Winkler, Bernd Tillack, D. Knoll, Andreas Fischer, R. Scholz, C. Wolf, R. Barth, Peter Schley, Valeriy Stikanov, Holger Rucker
Publikováno v:
Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2005..
We present a low-cost, modular BiCMOS process for wireless and mixed-signal applications. A SiGe:C bipolar module, a complementary LDMOS module, and a low-power flash memory were combined with a 0.25/spl mu/m CMOS technology to enable SoC integration
Autor:
A. Gromovyy, Valeriy Stikanov, K.E. Ehwald, Peter Schley, A. Fox, R. Barth, A. Hudyryev, C. Wolf, Steffen Marschmeyer
Publikováno v:
Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004..
This paper presents a process technology for cost-effective integration of low-power flash-memories into a 0.25 /spl mu/m, high performance RF-BiCMOS process. Only 4 additional lithographic mask steps are used on top of the baseline BiCMOS process, l