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pro vyhledávání: '"Valentin Touzeau"'
Publikováno v:
Proceedings of the ACM on Programming Languages
Proceedings of the ACM on Programming Languages, ACM, 2019, 3 (POPL), ⟨10.1145/3290367⟩
Proceedings of the ACM on Programming Languages, 2019, 3 (POPL), ⟨10.1145/3290367⟩
Proceedings of the ACM on Programming Languages, ACM, 2019, 3 (POPL), ⟨10.1145/3290367⟩
Proceedings of the ACM on Programming Languages, 2019, 3 (POPL), ⟨10.1145/3290367⟩
For applications in worst-case execution time analysis and in security, it is desirable to statically classify memory accesses into those that result in cache hits, and those that result in cache misses. Among cache replacement policies, the least re
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::59d555de8235e429b7521eef5043d0cb
https://hal.archives-ouvertes.fr/hal-01908648
https://hal.archives-ouvertes.fr/hal-01908648
Autor:
Valentin Touzeau, David Monniaux
Publikováno v:
Journal of the ACM (JACM)
Journal of the ACM (JACM), 2019, 66 (6), pp.41. ⟨10.1145/3366018⟩
Journal of the ACM (JACM), Association for Computing Machinery, 2019, 66 (6), pp.41. ⟨10.1145/3366018⟩
Journal of the ACM (JACM), 2019, 66 (6), pp.41. ⟨10.1145/3366018⟩
Journal of the ACM (JACM), Association for Computing Machinery, 2019, 66 (6), pp.41. ⟨10.1145/3366018⟩
Modern processors use cache memory, a memory access that “hits” the cache returns early, while a “miss” takes more time. Given a memory access in a program, cache analysis consists in deciding whether this access is always a hit, always a mis
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d728f414c63ba000fd70db177f57efc8
http://arxiv.org/abs/1811.01740
http://arxiv.org/abs/1811.01740
Publikováno v:
HAL
International audience; On real-time systems running under timing constraints, scheduling can be performed when one is aware of the worst case execution time (WCET) of tasks. Usually, the WCET of a task is unknown and schedulers make use of safe over
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b589e8041da70990f4340b3826748266
http://arxiv.org/abs/1701.08030
http://arxiv.org/abs/1701.08030
Publikováno v:
Computer Aided Verification ISBN: 9783319633893
CAV (2)
CAV (2)
Static cache analysis characterizes a program’s cache behavior by determining in a sound but approximate manner which memory accesses result in cache hits and which result in cache misses. Such information is valuable in optimizing compilers, worst
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::012a384397e3d593d6c64b92b4e509bf
https://doi.org/10.1007/978-3-319-63390-9_2
https://doi.org/10.1007/978-3-319-63390-9_2
Publikováno v:
ACM SIGARCH Computer Architecture News. 23:20-24
Static cache analysis characterizes a program's cache behavior by determining in a sound but approximate manner which memory accesses result in cache hits and which result in cache misses. Such information is valuable in optimizing compilers, worst-c