Implementation of binarized neural networks immune to device variation and voltage drop employing resistive random access memory bridges and capacitive neurons

Autor: Mona Ezzadeen, Atreya Majumdar, Olivier Valorge, Niccolo Castellani, Valentin Gherman, Guillaume Regis, Bastien Giraud, Jean-Philippe Noel, Valentina Meli, Marc Bocquet, Francois Andrieu, Damien Querlioz, Jean-Michel Portal

Publikováno v: Communications Engineering, Vol 3, Iss 1, Pp 1-15 (2024)

Abstract Resistive Random Access Memories (ReRAM) arrays provides a promising basement to deploy neural network accelerators based on near or in memory computing. However most popular accelerators rely on Ohm’s and Kirchhoff’s laws to achieve mul

Externí odkaz: https://doaj.org/article/d5a9d55ce1b346a281c00ff8d78741b5

Binary linear ECCs optimized for bit inversion in memories with asymmetric error probabilities

Autor: Bastien Giraud, Samuel Evain, Valentin Gherman

Publikováno v: DATE 2020-2020 Design, Automation & Test in Europe Conference & Exhibition
DATE 2020-2020 Design, Automation & Test in Europe Conference & Exhibition, IEEE, Mar 2020, Grenoble, France. pp.298-301, ⟨10.23919/DATE48585.2020.9116531⟩
DATE

ISBN: 9783981926347 - 9781728144689 (Print); International audience; Many memory types are asymmetric with respect to the error vulnerability of stored 0's and 1's. For instance, DRAM, STT-MRAM and NAND flash memories may suffer from asymmetric error

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c8ffea9631e4e288fcb3dd81166dedf8
https://hal-cea.archives-ouvertes.fr/cea-03469725/document

Is aproximate computing suitable for selective hardening of arithmetic circuits?

Autor: S. Pravossoudovitch, Arnaud Virazel, B. Deveautour, Valentin Gherman, Patrick Girard

Publikováno v: 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)
13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS), Apr 2018, Taormina, Italy. pp.1-6, ⟨10.1109/DTIS.2018.8368559⟩
2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)
DTIS 2018-13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era
DTIS 2018-13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, Apr 2018, Taormina, Italy. pp.1-6, ⟨10.1109/DTIS.2018.8368559⟩
DTIS

International audience; Selecting the ideal trade-off between reliability and cost associated with a fault tolerant architecture generally involves an extensive design space exploration. In this paper, we address the problem of selective hardening of

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::82fbddea1c9c9bde6762f95aabc818e0
https://hal-lirmm.ccsd.cnrs.fr/lirmm-03130537

Improvement of the tolerated raw bit error rate in NAND flash-based SSDs with the help of embedded statistics

Autor: Emna Farjallah, Marcelino Seif, Luigi Dilillo, Valentin Gherman, Jean-Marc Armani

Publikováno v: ITC
48th International Test Conference
ITC: International Test Conference
ITC: International Test Conference, Oct 2017, Fort Worth, United States. ⟨10.1109/TEST.2017.8242066⟩
ITC 2017-48th International Test Conference
ITC 2017-48th International Test Conference, Oct 2017, Fort Worth, United States. ⟨10.1109/TEST.2017.8242066⟩

International audience; Solid-state drives (SSDs) based on NAND flash memories provide an attractive storage solution as they are faster and less power hungry than traditional hard-disc drives (HDDs). Aggressive storage density improvements in flash

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3e48158c0d0a80b92ce81e663d2556fd
https://doi.org/10.1109/test.2017.8242066

Fip-flop selection for in-situ slack-time monitoring based on the activation probability of timing-critical paths

Autor: Ivan Miro-Panades, Lirida Alves de Barros Naviner, Sebastien Sarrazin, Valentin Gherman, Samuel Evain

Publikováno v: 2014 IEEE 20th International
Testing Symposium (IOLTS)
Testing Symposium (IOLTS), Jul 2014, Catalunya, Spain. pp.160-163, ⟨10.1109/IOLTS.2014.6873689⟩
IOLTS

Conference of 20th IEEE International On-Line Testing Symposium, IOLTS 2014 ; Conference Date: 7 July 2014 Through 9 July 2014; Conference Code:107097; International audience; In-situ slack-time monitoring may be used to enable ambitious power manage

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9d82bcd06a09264202e229818284d4f4
https://cea.hal.science/cea-01839855