Implementation of binarized neural networks immune to device variation and voltage drop employing resistive random access memory bridges and capacitive neurons

Autor: Mona Ezzadeen, Atreya Majumdar, Olivier Valorge, Niccolo Castellani, Valentin Gherman, Guillaume Regis, Bastien Giraud, Jean-Philippe Noel, Valentina Meli, Marc Bocquet, Francois Andrieu, Damien Querlioz, Jean-Michel Portal

Publikováno v: Communications Engineering, Vol 3, Iss 1, Pp 1-15 (2024)

Abstract Resistive Random Access Memories (ReRAM) arrays provides a promising basement to deploy neural network accelerators based on near or in memory computing. However most popular accelerators rely on Ohm’s and Kirchhoff’s laws to achieve mul

Externí odkaz: https://doaj.org/article/d5a9d55ce1b346a281c00ff8d78741b5

Improvement of the Tolerated Raw Bit Error Rate in NAND Flash-based SSDs with Selective Refresh

Autor: Valentin Gherman, Luigi Dilillo, Emna Farjallah, Jean-Marc Armani

Publikováno v: Microelectronics Reliability
Microelectronics Reliability, Elsevier, 2019, 96, pp.37-45. ⟨10.1016/j.microrel.2019.01.014⟩
Microelectronics Reliability, 2019, 96, pp.37-45. ⟨10.1016/j.microrel.2019.01.014⟩

International audience; A recent large-scale study revealed that the uncorrectable bit error rates in data center solid-sate drives (SSDs) may fall far below the JEDEC standard recommendations. Here, a new refresh policy is proposed to improve the to

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::51d0592b74f01c7206d4004a057bb7c5
https://hal-lirmm.ccsd.cnrs.fr/lirmm-02008002

Is aproximate computing suitable for selective hardening of arithmetic circuits?

Autor: S. Pravossoudovitch, Arnaud Virazel, B. Deveautour, Valentin Gherman, Patrick Girard

Publikováno v: 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)
13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS), Apr 2018, Taormina, Italy. pp.1-6, ⟨10.1109/DTIS.2018.8368559⟩
2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS)
DTIS 2018-13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era
DTIS 2018-13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, Apr 2018, Taormina, Italy. pp.1-6, ⟨10.1109/DTIS.2018.8368559⟩
DTIS

International audience; Selecting the ideal trade-off between reliability and cost associated with a fault tolerant architecture generally involves an extensive design space exploration. In this paper, we address the problem of selective hardening of

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::82fbddea1c9c9bde6762f95aabc818e0
https://hal-lirmm.ccsd.cnrs.fr/lirmm-03130537

Refresh frequency reduction of data stored in SSDs based on A-timer and timestamps

Autor: Valentin Gherman, Francis Joffre, Costin Anghel, Marcelino Seif, Franck Badets, Emna Farjallah, Emna Chabchoub, Christophe Layer, Jean-Marc Armani, Luigi Dilillo

Publikováno v: 22nd IEEE European Test Symposium
ETS: European Test Symposium
ETS: European Test Symposium, May 2017, Limassol, Cyprus. pp.1-6, ⟨10.1109/ETS.2017.7968233⟩
ETS 2017-22nd IEEE European Test Symposium
ETS 2017-22nd IEEE European Test Symposium, May 2017, Limassol, Cyprus. pp.7968233, ⟨10.1109/ETS.2017.7968233⟩
ETS

International audience; Increasing the number of bits per cell and technology scaling are ways to reduce the cost per gigabyte of flash memories and solid-state drives (SSDs). Unfortunately, this trend has a negative impact on data retention capabili

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e4cb994baf0edb369b31dc7dae7c8dc0
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01687675

Shadow-scan design with low latency overhead and in-situ slack-time monitoring

Autor: Lirida Alves de Barros Naviner, Suresh Pajaniradja, Sebastien Sarrazin, Valentin Gherman, Alexandre Valentian, Samuel Evain, Ivan Miro-Panades

Publikováno v: 2014 19th IEEE European Test Symposium (ETS)
2014 19th IEEE European Test Symposium (ETS), May 2014, Paderborn, Germany. ⟨10.1109/ETS.2014.6847801⟩
ETS

Conference of 19th IEEE European Test Symposium, ETS 2014 ; Conference Date: 26 May 2014 Through 30 May 2014; Conference Code:106457; International audience; Shadow-scan solutions are proposed in order to facilitate the implementation of faster scan

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4e6d405bbf06f04eab52327c5afcbc6a
https://hal-cea.archives-ouvertes.fr/cea-01838144