2-D shallow junction mapping by dual lens electron holography

Autor: Yun-Yu Wang, A. Katnani, V. Ontalus, R. Krishnasamy, J. N. Nxumalo

Publikováno v: 2017 17th International Workshop on Junction Technology (IWJT).

In planar device technology, shallow junction is a structure to control source to drain off current leakage when the gate becomes narrow to keep up with scaling of semiconductor device. High spatial resolution characterization of the device junction

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::414b089b5b2b4c15b1eba385ee706ec0
https://doi.org/10.23919/iwjt.2017.7966507

Crystallization behaviour and phase coexistence at morphotrophic phase boundaries in PZT thin films prepared by sol-gel processing

Autor: C. Parlog, V. Ontalus, F. Vasiliu, C. Cobianu

Publikováno v: Journal of Materials Science. 31:3639-3642

Pb(Zr0.53Ti0.47)O3 (PZT) thin films, prepared by sol-gel techniques and deposited on to Si/SiO2/Ti/Pt substrates, have been subjected to thermal annealing in a range of temperatures from 550–800 °C. The crystallization behaviour and phase coexiste

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::ea9fea027862c2074457c9a385e8793e
https://doi.org/10.1007/bf00352771

High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography

Autor: P. Agnello, T. Ivers, C. Warm, R. Wise, R. Wachnik, D. Schepis, S. Sankaran, J. Norum, S. Luning, Y. Li, M. Khare, A. Grill, D. Edelstein, X. Chen, D. Brown, R. Augur, S. Wu, J. Yu, R.C. Wong, J. Werking, D. Wehella-Gamage, A. Vayshenker, H. Van Meer, R. Van Den Nieuwenhuizen, C. Tian, K. Tabakman, C.Y. Sung, T. Standaert, A. Simon, J. Sim, C. Sheraw, D. Restaino, W. Rausch, R. Pal, C. Prindle, X. Ouyang, C. Ouyang, V. Ontalus, K. Nummy, D. Nielsen, L. Nicholson, A. McKnight, N. Lustig, X. Liu, M.H. Lee, D. Lea, G. Larosa, W. Landers, B. Kim, M. Kelling, S.-J. Jeng, J. Holt, M. Hargrove, S. Grunow, S. Greco, S. Gates, A. Frye, P. Fisher, A. Domenicucci, C. Dimitrakopoulos, G. Costrini, A. Chou, J. Cheng, S. Butt, L. Black, M. Belyansky, I. Ahsan, T. Adam, A. Gabor, C.-H.J. Wu, D. Yang, M. Crouse, C. Robinson, D. Corliss, C. Fonseca, J. Johnson, M. Weybright, A. Waite, H.M. Nayfeh, K. Onishi, S. Narasimha

Publikováno v: 2006 International Electron Devices Meeting.

We present a 45-nm SOI CMOS technology that features: i) aggressive ground-rule (GR) scaling enabled by 1.2NA/193nm immersion lithography, ii) high-performance FET response enabled by the integration of multiple advanced strain and activation techniq

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::bf10344b83d49f15325667340363c388
https://doi.org/10.1109/iedm.2006.346879

PbTiO/sub 3/ films via sol-gel

Autor: D. Dascalu, C. Parlog, Cornel Cobianu, Mariuca Gartner, V. Ontalus

Publikováno v: 1995 International Semiconductor Conference. CAS '95 Proceedings.

The changes in the structural composition of each phase (sol, powder, film) of sol-gel derived PbTiO/sub 3/ (PT) are reported as a function of thermal processing conditions and of type of catalysts introduced. The dense amorphous layers turn into cry

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::0f09475c26e5a47242c15d225522f778
https://doi.org/10.1109/smicnd.1995.494922

Application of Electron Holography to Semiconductor Structures and Devices

Autor: Kathryn T. Schonenberg, Paul Ronsheim, Michael A. Gribelyuk, T. N. Adam, V. Ontalus, Jun Yuan

Publikováno v: Microscopy and Microanalysis. 16:568-569

Extended abstract of a paper presented at Microscopy and Microanalysis 2010 in Portland, Oregon, USA, August 1 – August 5, 2010.

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::99f33a55ed5ee28523ec8f3c07df94e4
https://doi.org/10.1017/s143192761005587x