Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Uwe Sparmann"'
Autor:
Claus-Peter Schnorr, Hermann Walter, Volker Claus, Wolffried Stucky, Hans-Peter Blatt, Otto Spaniol, Gerd Kaufholz, Rainer Kemp, Wolfgang Paul, Eberhard Bertsch, Herbert Kopp, Manfred Stadel, Ulrich Schmitt, Wolfgang Weidner, Wolfgang Gräber, Dung Huynh, Rockford Ross, Michael Breder, Klaus Estenfeld, Axel Pink, Jan Messerschmidt, Hans Simon, Bernd Becker, Rolf Strothmann, Peter Auler, Johannes Arz, Paul Molitor, Reiner Kolla, Thomas Kretschmer, Franz Josef Schmitt, Ursula Becker, Reiner Marzinkewitsch, Hans Georg Osthof, Uwe Sparmann, Jürgen Sellen, Joachim Hartmann, Yonggang Guan, Gisela Sparmann, Hongzhong Wu, Elmar Schömer, Thomas Burch, Björn Schieffer, Christoph Scholl, Frank Follert, Thomas Chadzelek, Frank Schulz, Jens Eckstein, Matthias Buck, Bin Zhu, Alexander Gamkrelidze, Jörg Sauer, Timo von Oertzen, Tobias Gärtner, Christopher Durst
Publikováno v:
Festschrift zum 90. Geburtstag von Prof. Dr. Dr. h.c. mult. Günter Hotz ISBN: 9783658378219
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::32e48b6842861657b3f0a0df274a2dcd
https://doi.org/10.1007/978-3-658-37822-6_1
https://doi.org/10.1007/978-3-658-37822-6_1
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 7:156-166
It has been shown earlier that, if we are restricted to unate gate network (UGN) realizations, there exist universal test sets for Boolean functions. Such a test set only depends on the function f, and checks any UGN realization of f for all multiple
Publikováno v:
Integration. 18:201-218
The problem of detecting single cellular faults in arbitrarily large one-dimensional, unilateral, combinational iterative logic array (= ILAs) is considered. Fault patterns (= FPs) of the ILA's basic cell are introduced to characterize any cellular f
Autor:
Uwe Sparmann, Bernd Becker
Publikováno v:
Scopus-Elsevier
FTCS
FTCS
We consider the test pattern generation problem for circuits, which compute expressions over some algebraic structure. The relation between algebraic properties of this structure and test complexity (i.e. the best possible test size) is analyzed. Her
Autor:
Uwe Sparmann, Bernd Becker
Publikováno v:
Fundamenta Informaticae. 14:185-219
In this paper testability aspects of Recursive Carry Computation adders are considered. The class of RCC-adders has been introduced in [5] and contains a wide range of different adder realizations (e.g., optimal time adders such as the the carry look
Publikováno v:
Scopus-Elsevier
Local transformations are used in several synthesis approaches. During application of such transformations attention has to be paid to many important properties, e.g. area, speech, power consumption, and testability. In this paper we study relations
Publikováno v:
Asian Test Symposium
We consider delay testing of a specific class of logic circuits, the so called 'unate gate networks (UGNs)', which are of importance for the realization of dynamic CMOS logic and in the field of on-line error detection. It has been shown earlier, tha
Publikováno v:
ITC
Conventional tools for test generation and fault simulation appear to the test engineer as black boxes which neither communicate their results in a convenient way, nor allow for any interactive guidance by the test engineer. In contrast, the HIT syst
Autor:
Uwe Sparmann
Publikováno v:
TEUBNER-TEXTE zur Informatik ISBN: 9783815420331
The problem of deriving high quality tests for fast combinational floating-point realizations is investigated. Floating-point circuits are heterogeneous, consisting of a large number of regular and irregular modules. Thus, the test strategy applied c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::57ad3e6c214056332922c3fabcdead03
https://doi.org/10.1007/978-3-322-95233-2_26
https://doi.org/10.1007/978-3-322-95233-2_26
Autor:
Bernd Becker, Uwe Sparmann
Publikováno v:
VLSI Algorithms and Architectures ISBN: 9780387968186
AWOC
AWOC
We confine ourselves to one of the basic problems of testing, the test pattern generation problem for combinational circuits, and study the relation between structural properties and test complexity.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6c2e10d7dae665110540275fa5bdc460
https://doi.org/10.1007/bfb0040396
https://doi.org/10.1007/bfb0040396