Fault tolerant register file design for MIPS AES-crypto microprocessor.

Autor: Ustaoglu, Buse, Yalcin, Berna Ors

Publikováno v: 2015 IEEE International Conference on Electronics, Circuits & Systems (ICECS); 2015, p442-445, 4p

Design and implementation of a custom verification environment for fault injection and analysis on an embedded microprocessor.

Autor: Ustaoglu, Buse, Ors, Berna

Publikováno v: 2015 Third International Conference on Technological Advances in Electrical, Electronics & Computer Engineering (TAEECE); 2015, p256-261, 6p

Throughput enhancement for a new time-delay sampled-data system based True Random Bit Generator.

Autor: Yeniceri, Ramazan, Ustaoglu, Buse, Yalcin, Mustak E.

Publikováno v: 2013 European Conference on Circuit Theory & Design (ECCTD); 2013, p1-4, 4p